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Class Information
Number: 438/185
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having schottky gate (e.g., mesfet, hemt, etc.) > Self-aligned > Doping of semiconductive region > Utilizing gate sidewall structure > Multiple doping steps
Description: Process including plural steps of doping the semiconductive regions of the substrate.

Patents under this class:
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Patent Number Title Of Patent Date Issued
8673733 Methods of transferring layers of material in 3D integration processes and related structures and devices Mar. 18, 2014
8344436 Semiconductor constructions and electronic systems Jan. 1, 2013
8324014 Process for depositing boron compounds by CVD or PVD Dec. 4, 2012
8298884 Method to reduce threshold voltage variability with through gate well implant Oct. 30, 2012
8119470 Mitigation of gate to contact capacitance in CMOS flow Feb. 21, 2012
8114725 Method of manufacturing MOS device having lightly doped drain structure Feb. 14, 2012
8110456 Method for making a self aligning memory device Feb. 7, 2012
7939886 Trench gate power semiconductor device May. 10, 2011
7932140 Semiconductor device and manufacturing method thereof Apr. 26, 2011
7858155 Plasma processing method and plasma processing apparatus Dec. 28, 2010
7795156 Producing method of semiconductor device Sep. 14, 2010
7645652 CMOS image sensor and method for fabricating the same Jan. 12, 2010
7301221 Controlling diffusion in doped semiconductor regions Nov. 27, 2007
7297617 Method for controlling diffusion in semiconductor regions Nov. 20, 2007
7285449 Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source /drain and semiconductor device manufactured by the method Oct. 23, 2007
7238577 Method of manufacturing self-aligned n and p type stripes for a superjunction device Jul. 3, 2007
7208377 Silicon oxidation method Apr. 24, 2007
7148158 Semiconductor device and method for manufacturing the same Dec. 12, 2006
7064017 Method of forming a CMOS transistor Jun. 20, 2006
7063991 Methods of determining characteristics of doped regions on device wafers, and system for accomplishing same Jun. 20, 2006
6967129 Semiconductor device and fabrication method thereof Nov. 22, 2005
6924180 Method of forming a pocket implant region after formation of composite insulator spacers Aug. 2, 2005
6881616 System for forming a semiconductor device and method thereof including implanting through a L shaped spacer to form source and drain regions Apr. 19, 2005
6821830 Method for fabricating a semiconductor device including using a hard mask or a silylated photoresist for an angled tilted ion implant Nov. 23, 2004
6777280 Method for fabricating an integrated circuit with a transistor electrode Aug. 17, 2004
6673645 Method and apparatus for a monolithic integrated mesfet and p-i-n optical receiver Jan. 6, 2004
6613621 Methods of forming self-aligned contact pads using a damascene gate process Sep. 2, 2003
6596554 Body-tied-to-source partially depleted SOI MOSFET Jul. 22, 2003
6570233 Method of fabricating an integrated circuit May. 27, 2003
6482706 Method to scale down device dimension using spacer to confine buried drain implant Nov. 19, 2002
6426247 Low bitline capacitance structure and method of making same Jul. 30, 2002
6406956 Poly resistor structure for damascene metal gate Jun. 18, 2002
6362117 Method of making integrated circuit with closely spaced components Mar. 26, 2002
6300171 Method of manufacturing an integrated edge structure for high voltage semiconductor devices, and related integrated edge structure Oct. 9, 2001
6251711 Method for forming bridge free silicide Jun. 26, 2001
6214654 Method for forming super-steep retrograded channel (SSRC) for CMOS transistor using rapid laser annealing to reduce thermal budget Apr. 10, 2001
6153454 Convex device with selectively doped channel Nov. 28, 2000
6020244 Channel dopant implantation with automatic compensation for variations in critical dimension Feb. 1, 2000
5953613 High performance MOSFET with a source removed from the semiconductor substrate and fabrication method thereof Sep. 14, 1999
5900662 MOS technology power device with low output resistance and low capacitance, and related manufacturing process May. 4, 1999
5837568 Manufacturing method of semiconductor devices Nov. 17, 1998
5585289 Method of producing metal semiconductor field effect transistor Dec. 17, 1996
5504039 Method for making a self-aligned oxide gate cap Apr. 2, 1996
5471073 Field effect transistor and method for producing the field effect transistor Nov. 28, 1995
5447874 Method for making a semiconductor device comprising a dual metal gate using a chemical mechanical polish Sep. 5, 1995
5405792 Method of manufacturing schottky barrier gate type fet Apr. 11, 1995
5250453 Production method of a semiconductor device Oct. 5, 1993
5187111 Method of manufacturing Schottky barrier gate FET Feb. 16, 1993
5182218 Production methods for compound semiconductor device having lightly doped drain structure Jan. 26, 1993
5112766 Method of manufacturing field effect transistors May. 12, 1992

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