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Class Information
Number: 438/18
Name: Semiconductor device manufacturing: process > With measuring or testing > Electrical characteristic sensed > Utilizing integral test element
Description: Process wherein the electrical property is sensed utilizing a specific test structure integral to the semiconductor substrate and which has no other function in the completed device.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7618833 |
Method for pre-treating epitaxial layer, method for evaluating epitaxial layer, and apparatus for evaluating epitaxial layer |
Nov. 17, 2009 |
| 7615781 |
Semiconductor wafer and semiconductor device, and method for manufacturing same |
Nov. 10, 2009 |
| 7608469 |
Method of fabricating a chip |
Oct. 27, 2009 |
| 7601559 |
Apparatus and method for identifying proper orientation and electrical conductivity between a semiconductor device and a socket or contactor |
Oct. 13, 2009 |
| 7598099 |
Method of controlling a fabrication process using an iso-dense bias |
Oct. 6, 2009 |
| 7598100 |
Manufacturing method of semiconductor integrated circuit device |
Oct. 6, 2009 |
| 7595557 |
Semiconductor device and manufacturing method thereof |
Sep. 29, 2009 |
| 7588950 |
Test pattern for reliability measurement of copper interconnection line having moisture window and method for manufacturing the same |
Sep. 15, 2009 |
| 7582493 |
Distinguishing between dopant and line width variation components |
Sep. 1, 2009 |
| 7582494 |
Device structures for reducing device mismatch due to shallow trench isolation induced oxides stresses |
Sep. 1, 2009 |
| 7566946 |
Precision passive circuit structure |
Jul. 28, 2009 |
| 7567872 |
Film forming condition determination method, film forming method, and film structure manufacturing method |
Jul. 28, 2009 |
| 7560292 |
Voltage contrast monitor for integrated circuit defects |
Jul. 14, 2009 |
| 7560293 |
Evaluation method using a TEG, a method of manufacturing a semiconductor device having the TEG, an element substrate and a panel having the TEG, a program for controlling dosage and a computer |
Jul. 14, 2009 |
| 7560345 |
Method of assessing potential for charging damage in integrated circuit designs and structures for preventing charging damage |
Jul. 14, 2009 |
| 7558969 |
Anti-pirate circuit for protection against commercial integrated circuit pirates |
Jul. 7, 2009 |
| 7556973 |
Manufacturing method for semiconductor device |
Jul. 7, 2009 |
| 7550382 |
Manufacturing method of semiconductor device, evaluation method of semiconductor device, and semiconductor device |
Jun. 23, 2009 |
| 7550303 |
Systems and methods for overlay shift determination |
Jun. 23, 2009 |
| 7541613 |
Methods for reducing within chip device parameter variations |
Jun. 2, 2009 |
| 7537941 |
Variable overlap of dummy shapes for improved rapid thermal anneal uniformity |
May. 26, 2009 |
| 7537959 |
Chip stack package and manufacturing method thereof |
May. 26, 2009 |
| 7534320 |
Lamination press pad |
May. 19, 2009 |
| 7534632 |
Method for circuits inspection and method of the same |
May. 19, 2009 |
| 7531136 |
Chemical sensor |
May. 12, 2009 |
| 7531368 |
In-line lithography and etch system |
May. 12, 2009 |
| 7521265 |
Method for measuring an amount of strain of a bonded strained wafer |
Apr. 21, 2009 |
| 7521950 |
Wafer level I/O test and repair enabled by I/O layer |
Apr. 21, 2009 |
| 7517708 |
Real-time parameter tuning using wafer temperature |
Apr. 14, 2009 |
| 7514274 |
Enhanced uniqueness for pattern recognition |
Apr. 7, 2009 |
| 7514276 |
Aligning stacked chips using resistance assistance |
Apr. 7, 2009 |
| 7511507 |
Integrated circuit and circuit board |
Mar. 31, 2009 |
| 7510895 |
Inferential temperature control system |
Mar. 31, 2009 |
| 7504270 |
Methods of quantifying variations resulting from manufacturing-induced corner rounding of various features, and structures for testing same |
Mar. 17, 2009 |
| 7494828 |
Substrate holder and device manufacturing method |
Feb. 24, 2009 |
| 7494830 |
Method and device for wafer backside alignment overlay accuracy |
Feb. 24, 2009 |
| 7491970 |
IC with comparator receiving expected and mask data from pads |
Feb. 17, 2009 |
| 7491555 |
Method and semiconductor structure for monitoring the fabrication of interconnect structures and contacts in a semiconductor device |
Feb. 17, 2009 |
| 7489151 |
Layout for DUT arrays used in semiconductor wafer testing |
Feb. 10, 2009 |
| 7489152 |
Characterizing circuit performance by separating device and interconnect impact on signal delay |
Feb. 10, 2009 |
| 7488937 |
Method and apparatus for the improvement of material/voltage contrast |
Feb. 10, 2009 |
| 7485475 |
Method of accelerating test of semiconductor device |
Feb. 3, 2009 |
| 7486097 |
Proximity sensitive defect monitor |
Feb. 3, 2009 |
| RE40623 |
Method and apparatus for identifying integrated circuits |
Jan. 20, 2009 |
| 7476555 |
Method of chip manufacturing |
Jan. 13, 2009 |
| 7473568 |
Memory-module manufacturing method with memory-chip burn-in and full functional testing delayed until module burn-in |
Jan. 6, 2009 |
| 7468283 |
Method and resulting structure for fabricating test key structures in DRAM structures |
Dec. 23, 2008 |
| 7468525 |
Test structures for development of metal-insulator-metal (MIM) devices |
Dec. 23, 2008 |
| 7465590 |
Measurement of a sample using multiple models |
Dec. 16, 2008 |
| 7463826 |
Apparatus for measuring response time and method of measuring of response time using the same |
Dec. 9, 2008 |
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