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Class Information
Number: 438/175
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having schottky gate (e.g., mesfet, hemt, etc.) > Buried channel
Description: Process for making a Schottky gate field effect transistor wherein the channel formed between the source and drain regions is configured so as to be buried beneath the semiconductor substrate surface.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8617968 Strained silicon and strained silicon germanium on insulator metal oxide semiconductor field effect transistors (MOSFETs) Dec. 31, 2013
8524558 Split gate with different gate materials and work functions to reduce gate resistance of ultra high density MOSFET Sep. 3, 2013
8476125 Fabrication technique for high frequency, high power group III nitride electronic devices Jul. 2, 2013
8343836 Recessed gate channel with low Vt corner Jan. 1, 2013
8119474 High performance capacitors in planar back gates CMOS Feb. 21, 2012
8105924 Deep trench based far subcollector reachthrough Jan. 31, 2012
8101474 Structure and method of forming buried-channel graphene field effect device Jan. 24, 2012
7977200 Charge breakdown avoidance for MIM elements in SOI base technology and method Jul. 12, 2011
7952128 Semiconductor device May. 31, 2011
7910413 Structure and method of fabricating FinFET with buried channel Mar. 22, 2011
7867833 Semiconductor device utilizing a metal gate material such as tungsten and method of manufacturing the same Jan. 11, 2011
7727867 Method for manufacturing SIMOX wafer Jun. 1, 2010
7705396 Trench type MOSFET and method of fabricating the same Apr. 27, 2010
7691734 Deep trench based far subcollector reachthrough Apr. 6, 2010
7682887 Transistor having high mobility channel and methods Mar. 23, 2010
7544551 Technique for strain engineering in Si-based Transistors by using embedded semiconductor layers including atoms with high covalent radius Jun. 9, 2009
7544552 Method for manufacturing junction semiconductor device Jun. 9, 2009
7485514 Method for fabricating a MESFET Feb. 3, 2009
7320908 Methods of forming semiconductor devices having buried oxide patterns Jan. 22, 2008
7285456 Method of fabricating a fin field effect transistor having a plurality of protruding channels Oct. 23, 2007
7075829 Programmable memory address and decode circuits with low tunnel barrier interpoly insulators Jul. 11, 2006
7002187 Integrated schottky diode using buried power buss structure and method for making same Feb. 21, 2006
6955969 Method of growing as a channel region to reduce source/drain junction capacitance Oct. 18, 2005
6867078 Method for forming a microwave field effect transistor with high operating voltage Mar. 15, 2005
6808968 Method of manufacturing a semiconductor device Oct. 26, 2004
6635518 SOI FET and method for creating FET body connections with high-quality matching characteristics and no area penalty for partially depleted SOI technologies Oct. 21, 2003
6620672 SOI DRAM with buried capacitor under the digit lines utilizing a self aligning penetrating storage node contact formation Sep. 16, 2003
6429069 SOI DRAM with buried capacitor under the digit lines utilizing a self aligning penetrating storage node contact formation Aug. 6, 2002
6376291 Process for manufacturing buried channels and cavities in semiconductor material wafers Apr. 23, 2002
6316297 Semiconductor device and method for fabricating the same Nov. 13, 2001
6258639 Sintered gate schottky barrier fet passivated by a degradation-stop layer Jul. 10, 2001
6222201 Method of forming a novel self-aligned offset thin film transistor and the structure of the same Apr. 24, 2001
6200838 Compound semiconductor device and method of manufacturing the same Mar. 13, 2001
6180440 Method of fabricating a recessed-gate FET without producing voids in the gate metal Jan. 30, 2001
6165824 Method of manufacturing a semiconductor device Dec. 26, 2000
6143646 Dual in-laid integrated circuit structure with selectively positioned low-K dielectric isolation and method of formation Nov. 7, 2000
6037194 Method for making a DRAM cell with grooved transfer device Mar. 14, 2000
6033941 Method of forming a thin film transistor with asymmetrically arranged gate electrode and offset region Mar. 7, 2000
6008079 Method for forming a high density shallow trench contactless nonvolatile memory Dec. 28, 1999
5926693 Two level transistor formation for optimum silicon utilization Jul. 20, 1999
5894137 Semiconductor device with an active layer having a plurality of columnar crystals Apr. 13, 1999
5885847 Method of fabricating a compound semiconductor device Mar. 23, 1999
5643807 Method of manufacturing a semiconductor device comprising a buried channel field effect transistor Jul. 1, 1997
5532184 Method of fabricating a semiconductor device using quantum dots or wires Jul. 2, 1996
5336626 Method of manufacturing a MESFET with an epitaxial void Aug. 9, 1994
4837175 Making a buried channel FET with lateral growth over amorphous region Jun. 6, 1989
4833095 Method for buried channel field effect transistor for microwave and millimeter frequencies utilizing ion implantation May. 23, 1989
4724220 Method for fabricating buried channel field-effect transistor for microwave and millimeter frequencies Feb. 9, 1988
4601096 Method for fabricating buried channel field effect transistor for microwave and millimeter frequencies utilizing molecular beam epitaxy Jul. 22, 1986
4503600 Process for manufacturing a buried gate field effect transistor Mar. 12, 1985

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