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Class Information
Number: 438/129
Name: Semiconductor device manufacturing: process > Making device array and selectively interconnecting > With electrical circuit layout
Description: Process including a step of designing the topological arrangement of arrayed device components or electrical conductors therebetween in combination with making the semiconductor device array.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7598100 |
Manufacturing method of semiconductor integrated circuit device |
Oct. 6, 2009 |
| 7595229 |
Configurable integrated circuit capacitor array using via mask layers |
Sep. 29, 2009 |
| 7596420 |
Device manufacturing method and computer program product |
Sep. 29, 2009 |
| 7589363 |
Fuse structures, methods of making and using the same, and integrated circuits including the same |
Sep. 15, 2009 |
| 7569428 |
Method for manufacturing semiconductor device, semiconductor device and apparatus comprising same |
Aug. 4, 2009 |
| 7567735 |
Optical device wafer, and optical device chip and method for manufacturing the same |
Jul. 28, 2009 |
| 7562327 |
Mask layout design improvement in gate width direction |
Jul. 14, 2009 |
| 7553703 |
Methods of forming an interconnect structure |
Jun. 30, 2009 |
| 7540970 |
Methods of fabricating a semiconductor device |
Jun. 2, 2009 |
| 7538438 |
Substrate warpage control and continuous electrical enhancement |
May. 26, 2009 |
| 7535035 |
Cross-point nonvolatile memory devices using binary metal oxide layer as data storage material layer and methods of fabricating the same |
May. 19, 2009 |
| 7531852 |
Electronic unit with a substrate where an electronic circuit is fabricated |
May. 12, 2009 |
| 7533361 |
System and process for manufacturing custom electronics by combining traditional electronics with printable electronics |
May. 12, 2009 |
| 7531388 |
Electrically programmable fuse structures with narrowed width regions configured to enhance current crowding and methods of fabricating thereof |
May. 12, 2009 |
| 7524754 |
Interconnect shunt used for current distribution and reliability redundancy |
Apr. 28, 2009 |
| 7521349 |
Fundamental cell, semiconductor integrated circuit device, wiring method and wiring apparatus |
Apr. 21, 2009 |
| 7504320 |
Method for manufacturing a tag integrated circuit flexible board |
Mar. 17, 2009 |
| 7494849 |
Methods for fabricating multi-terminal phase change devices |
Feb. 24, 2009 |
| 7489072 |
Organic electroluminescence display device and method for fabricating the same |
Feb. 10, 2009 |
| 7446038 |
Interlayer interconnect of three-dimensional memory and method for manufacturing the same |
Nov. 4, 2008 |
| 7427536 |
High density stepped, non-planar nitride read only memory |
Sep. 23, 2008 |
| 7422945 |
Cell based integrated circuit and unit cell architecture therefor |
Sep. 9, 2008 |
| 7418692 |
Method for designing structured ASICS in silicon processes with three unique masking steps |
Aug. 26, 2008 |
| 7398280 |
Method and system for manufacturing integrated circuits meeting special customer requirements with multiple subcontractors in remote locations |
Jul. 8, 2008 |
| 7393737 |
Semiconductor device and a method of manufacturing the same |
Jul. 1, 2008 |
| 7393755 |
Dummy fill for integrated circuits |
Jul. 1, 2008 |
| 7374986 |
Method of fabricating field effect transistor (FET) having wire channels |
May. 20, 2008 |
| 7364951 |
Nonvolatile semiconductor memory device and method for manufacturing the same |
Apr. 29, 2008 |
| 7358955 |
Liquid crystal display for mobile phone |
Apr. 15, 2008 |
| 7344924 |
Fuse structures, methods of making and using the same, and integrated circuits including the same |
Mar. 18, 2008 |
| 7344923 |
NROM semiconductor memory device and fabrication method |
Mar. 18, 2008 |
| 7341891 |
Method for manufacturing a memory cell for modification of revision identifier in an integrated circuit chip |
Mar. 11, 2008 |
| 7338824 |
Method for manufacturing FFS mode LCD |
Mar. 4, 2008 |
| 7335536 |
Method for fabricating low resistance, low inductance interconnections in high current semiconductor devices |
Feb. 26, 2008 |
| 7332377 |
Manufacturing method with self-aligned arrangement of solid body electrolyte memory cells of minimum structure size |
Feb. 19, 2008 |
| 7332378 |
Integrated circuit memory system with dummy active region |
Feb. 19, 2008 |
| 7326595 |
Semiconductor integrated circuit and method of redesigning same |
Feb. 5, 2008 |
| 7320904 |
Manufacturing method for non-active electrically structures in order to optimize the definition of active electrically structures in an electronic circuit integrated on a semiconductor substra |
Jan. 22, 2008 |
| 7306977 |
Method and apparatus for facilitating signal routing within a programmable logic device |
Dec. 11, 2007 |
| 7294534 |
Interconnect layout method |
Nov. 13, 2007 |
| 7247553 |
Method of manufacturing a semiconductor device |
Jul. 24, 2007 |
| 7233017 |
Multibit phase change memory device and method of driving the same |
Jun. 19, 2007 |
| 7214551 |
Multiple gate electrode linewidth measurement and photoexposure compensation method |
May. 8, 2007 |
| 7208350 |
Method and device for producing layout patterns of a semiconductor device having an even wafer surface |
Apr. 24, 2007 |
| 7202116 |
Thin film transistor substrate for display device and fabricating method thereof |
Apr. 10, 2007 |
| 7200831 |
Semiconductor integrated circuit wiring design method and semiconductor integrated circuit |
Apr. 3, 2007 |
| 7186592 |
High performance, integrated, MOS-type semiconductor device and related manufacturing process |
Mar. 6, 2007 |
| 7179690 |
High reliability triple redundant latch with voting logic on each storage node |
Feb. 20, 2007 |
| 7176535 |
Thin film transistor array gate electrode for liquid crystal display device |
Feb. 13, 2007 |
| 7163847 |
Method of making circuitized substrate |
Jan. 16, 2007 |
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