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Class Information
Number: 375/376
Name: Pulse or digital communications > Synchronizers > Phase displacement, slip or jitter correction > Phase locking > Phase locked loop
Description: Subject matter having a closed-loop electronic servomechanism the output of which locks onto and tracks a received signal to provide the frequency and phase aligned receiver clock.










Patents under this class:

Patent Number Title Of Patent Date Issued
8711983 Phase locking loop Apr. 29, 2014
8705676 Method and apparatus for clock recovery in XDSL transceivers Apr. 22, 2014
8704602 Two-point modulation device using voltage controlled oscillator, and calibration method Apr. 22, 2014
8693608 Frequency synchronization using clock recovery loop with adaptive packet filtering Apr. 8, 2014
8692599 Interpolative divider linearity enhancement techniques Apr. 8, 2014
8687756 CDR with digitally controlled lock to reference Apr. 1, 2014
8687738 Circuits and methods using a majority vote Apr. 1, 2014
8686768 Phase locked loop Apr. 1, 2014
8686756 Time-to-digital converter and digital-controlled clock generator and all-digital clock generator Apr. 1, 2014
8681919 Burst phase detection for phase cyclic data streams Mar. 25, 2014
8681917 Synchronous transfer of streaming data in a distributed antenna system Mar. 25, 2014
8675801 Clock generating circuit, transceiver and related method Mar. 18, 2014
8675800 Synchronizing circuit, synchronizing method, and receiving system Mar. 18, 2014
8674733 Phase control circuit Mar. 18, 2014
8669890 Method and apparatus of estimating/calibrating TDC mismatch Mar. 11, 2014
8666013 Techniques for clock data recovery Mar. 4, 2014
8666011 Jitter-attenuated clock using a gapped clock reference Mar. 4, 2014
8666010 Phase detector for bursty data streams Mar. 4, 2014
8665929 Method and device for deterministic timing acquiring and tracking Mar. 4, 2014
8665928 Circuit for generating an output clock signal synchronized to an input clock signal Mar. 4, 2014
8660171 Method and apparatus for timing jitter measurement Feb. 25, 2014
8653869 Segmented fractional-N PLL Feb. 18, 2014
8648626 Clock generators, clock generating methods, and mobile communication device using the clock generator Feb. 11, 2014
8648625 Frequency synthesizer Feb. 11, 2014
8644783 Methods and systems for determining an offset term for a synthesizer signal, and methods and systems for producing a phase-corrected digital signal Feb. 4, 2014
8644441 Clock generators and clock generation methods thereof Feb. 4, 2014
8644440 Apparatus and methods for detection and correction of transmitter duty cycle distortion Feb. 4, 2014
8638896 Repeate architecture with single clock multiplier unit Jan. 28, 2014
8638884 Data processing unit and signal receiver including the data processing unit Jan. 28, 2014
8638172 Local oscillator Jan. 28, 2014
8638146 Dual mode phase detection Jan. 28, 2014
8638110 High resolution circuit for converting capacitance-to-time deviation Jan. 28, 2014
8635040 Signal measuring device and signal measuring method Jan. 21, 2014
8634512 Two point modulation digital phase locked loop Jan. 21, 2014
8634511 Digital phase frequency detector, digital phase locked loop including the same and method of detecting phase and frequency of output signal Jan. 21, 2014
8634503 Fast lock clock-data recovery for phase steps Jan. 21, 2014
8633840 Sequence transition point determining method and apparatus thereof Jan. 21, 2014
8629728 VCO control circuit and method thereof, fast locking PLL and method for fast locking PLL Jan. 14, 2014
8625730 Phase locked loop, CDR circuit, and receiving circuit Jan. 7, 2014
8625729 Method and device for clock data recovery Jan. 7, 2014
8625728 System and method for reducing electromagnetic interference and ground bounce in an information communication system by controlling phase of clock signals among a plurality of information comm Jan. 7, 2014
8619938 Clock generation devices and methods Dec. 31, 2013
8619937 Integrated CMOS clock generator with a self-biased phase locked loop circuit Dec. 31, 2013
8619924 Circuit, use, and method for controlling a receiver circuit Dec. 31, 2013
8619755 Systems and methods for providing a dual-master mode in a synchronous ethernet environment Dec. 31, 2013
8618967 Systems, circuits, and methods for a sigma-delta based time to digital converter Dec. 31, 2013
8615064 Phase locked loop circuit and receiver using the same Dec. 24, 2013
8611487 Enhanced phase discriminator for fast phase alignment Dec. 17, 2013
8611486 Adjustment of clock signals regenerated from a data stream Dec. 17, 2013
8611408 Apparatus for and method of developing equalized values from samples of a signal received from a channel Dec. 17, 2013











 
 
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