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Class Information
Number: 375/374
Name: Pulse or digital communications > Synchronizers > Phase displacement, slip or jitter correction > Phase locking > With charge pump or up and down counters
Description: Subject matter including a means for controlling the voltage which applied to the voltage control oscillator (VCO) as to change the frequency of the phase lock loop.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620137 |
System and method for clock drift correction for broadcast audio/video streaming |
Nov. 17, 2009 |
| 7616035 |
Charge pump for PLL/DLL |
Nov. 10, 2009 |
| RE40939 |
Multi-phase locked loop for data recovery |
Oct. 20, 2009 |
| 7606343 |
Phase-locked-loop with reduced clock jitter |
Oct. 20, 2009 |
| 7605663 |
Method and apparatus for stabilizing output frequency of PLL (phase lock loop) and phase lock loop thereof |
Oct. 20, 2009 |
| 7602876 |
Method and apparatus for generating a phase dependent control signal |
Oct. 13, 2009 |
| 7593498 |
Method and apparatus for automatic rate identification and channel synchronization in a master-slave setting for high data throughput applications |
Sep. 22, 2009 |
| 7580493 |
Electronic circuit |
Aug. 25, 2009 |
| 7580497 |
Clock data recovery loop with separate proportional path |
Aug. 25, 2009 |
| 7570721 |
Apparatus and method for multi-phase digital sampling |
Aug. 4, 2009 |
| 7567643 |
Phase lock loop device |
Jul. 28, 2009 |
| 7561652 |
High frequency spread spectrum clock generation |
Jul. 14, 2009 |
| 7555073 |
Automatic frequency control loop circuit |
Jun. 30, 2009 |
| 7542535 |
Method and apparatus for recovering a clock signal |
Jun. 2, 2009 |
| 7535977 |
Sigma-delta based phase lock loop |
May. 19, 2009 |
| 7532645 |
Receiver operable to receive data at a lower data rate |
May. 12, 2009 |
| 7519140 |
Automatic frequency correction PLL circuit |
Apr. 14, 2009 |
| 7508897 |
PLL circuit and high-frequency receiving device |
Mar. 24, 2009 |
| 7508894 |
Apparatus of adjusting wobble clock |
Mar. 24, 2009 |
| 7505542 |
Low jitter digital frequency synthesizer with frequency modulation capabilities |
Mar. 17, 2009 |
| 7505533 |
Clock data recovery circuit with phase decision circuit |
Mar. 17, 2009 |
| 7498889 |
Analog phase controller |
Mar. 3, 2009 |
| 7496168 |
Phase-locked loop using multi-phase feedback signals |
Feb. 24, 2009 |
| 7492849 |
Single-VCO CDR for TMDS data at gigabit rate |
Feb. 17, 2009 |
| 7492850 |
Phase locked loop apparatus with adjustable phase shift |
Feb. 17, 2009 |
| 7486757 |
Optical driver including a multiphase clock generator having a delay locked loop (DLL), optimized for gigahertz frequencies |
Feb. 3, 2009 |
| 7483508 |
All-digital frequency synthesis with non-linear differential term for handling frequency perturbations |
Jan. 27, 2009 |
| 7466785 |
PLL with balanced quadricorrelator |
Dec. 16, 2008 |
| 7439783 |
Phase-locked loop systems and methods |
Oct. 21, 2008 |
| 7436920 |
Burst mode receiver based on charge pump PLL with idle-time loop stabilizer |
Oct. 14, 2008 |
| 7436919 |
Methods and apparatus for bit synchronizing data transferred across a multi-pin asynchronous serial interface |
Oct. 14, 2008 |
| 7433442 |
Linear half-rate clock and data recovery (CDR) circuit |
Oct. 7, 2008 |
| 7428169 |
Nonvolatile semiconductor memory device and voltage generating circuit for the same |
Sep. 23, 2008 |
| 7424081 |
Semiconductor integrated circuit device |
Sep. 9, 2008 |
| 7424078 |
Synchronous compensator adaptively defining an enable range for synchronous compensation |
Sep. 9, 2008 |
| 7421052 |
Oscillator frequency selection |
Sep. 2, 2008 |
| 7418071 |
Method and apparatus for generating a phase dependent control signal |
Aug. 26, 2008 |
| 7408391 |
Charge pump for PLL/DLL |
Aug. 5, 2008 |
| 7409027 |
System and method for recovering a clock using a reduced rate linear phase detector and voltage controlled oscillator |
Aug. 5, 2008 |
| 7400690 |
Adaptive phase controller, method of controlling a phase and transmitter employing the same |
Jul. 15, 2008 |
| 7397882 |
Digital phase locked circuit capable of dealing with input clock signal provided in burst fashion |
Jul. 8, 2008 |
| 7386085 |
Method and apparatus for high speed signal recovery |
Jun. 10, 2008 |
| 7386065 |
Voltage controlled oscillator (VCO) suitable for use in frequency shift keying (FSK) system |
Jun. 10, 2008 |
| 7382849 |
Charge pump circuit |
Jun. 3, 2008 |
| 7356077 |
Method and apparatus for testing network integrity |
Apr. 8, 2008 |
| 7336110 |
Differential amplitude controlled sawtooth generator |
Feb. 26, 2008 |
| 7319731 |
High precision continuous time g.sub.mC BPF tuning |
Jan. 15, 2008 |
| 7277518 |
Low-jitter charge-pump phase-locked loop |
Oct. 2, 2007 |
| 7274764 |
Phase detector system with asynchronous output override |
Sep. 25, 2007 |
| 7271631 |
Clock multiplication circuit |
Sep. 18, 2007 |
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