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Class Information
Number: 375/373
Name: Pulse or digital communications > Synchronizers > Phase displacement, slip or jitter correction > Phase locking
Description: Subject matter wherein the receiver clock and received data are brought into frequency and phase alignment or coherence.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5394443 |
Multiple interval single phase clock |
Feb. 28, 1995 |
| 5377233 |
Seam-less data recovery |
Dec. 27, 1994 |
| 5371765 |
Binary phase accumulator for decimal frequency synthesis |
Dec. 6, 1994 |
| 5371766 |
Clock extraction and data regeneration logic for multiple speed data communications systems |
Dec. 6, 1994 |
| 5369672 |
Interface circuit capable of performing exact data transfer |
Nov. 29, 1994 |
| 5329559 |
Phase detector for very high frequency clock and data recovery circuits |
Jul. 12, 1994 |
| 5311560 |
Frequency synthesizer |
May. 10, 1994 |
| 5307342 |
Heterogeneous ports switch |
Apr. 26, 1994 |
| 5307382 |
Lock apparatus for dual phase locked loop |
Apr. 26, 1994 |
| 5301196 |
Half-speed clock recovery and demultiplexer circuit |
Apr. 5, 1994 |
| 5301210 |
Coherent demodulating device with carrier wave recovering digital circuit |
Apr. 5, 1994 |
| 5297181 |
Method and apparatus for providing a digital audio interface protocol |
Mar. 22, 1994 |
| 5297185 |
Pattern detection and synchronization circuit |
Mar. 22, 1994 |
| 5294842 |
Update synchronizer |
Mar. 15, 1994 |
| 5280501 |
Data bit synchronization |
Jan. 18, 1994 |
| 5253254 |
Telecommunications system with arbitrary alignment parallel framer |
Oct. 12, 1993 |
| 5235596 |
Circuit arrangement for generating synchronization signals in a transmission of data |
Aug. 10, 1993 |
| 5233636 |
Analog and digital phase detector for bit synchronism |
Aug. 3, 1993 |
| 5230012 |
Process and circuit arrangement for digital control of the frequency and/or phase of scanning clock pulses |
Jul. 20, 1993 |
| 5230013 |
PLL-based precision phase shifting at CMOS levels |
Jul. 20, 1993 |
| 5212716 |
Data edge phase sorting circuits |
May. 18, 1993 |
| 5197086 |
High speed digital clock synchronizer |
Mar. 23, 1993 |
| 5185768 |
Digital integrating clock extractor |
Feb. 9, 1993 |
| 5182761 |
Data transmission system receiver having phase-independent bandwidth control |
Jan. 26, 1993 |
| 5173927 |
Frequency detector system on a digital phase locked loop |
Dec. 22, 1992 |
| 5161173 |
Method of adjusting the phase of a clock generator with respect to a data signal |
Nov. 3, 1992 |
| 5151927 |
Dual-mode synchronization device, in particular for frame clock phase recovery in a half-duplex transmission system |
Sep. 29, 1992 |
| 5146478 |
Method and apparatus for receiving a binary digital signal |
Sep. 8, 1992 |
| 5138635 |
Network clock synchronization |
Aug. 11, 1992 |
| 5136614 |
Spread spectrum communication system |
Aug. 4, 1992 |
| 5134637 |
Clock recovery enhancement circuit |
Jul. 28, 1992 |
| 5131014 |
Apparatus and method for recovery of multiphase modulated data |
Jul. 14, 1992 |
| 5128970 |
Non-return to zero synchronizer |
Jul. 7, 1992 |
| 5125008 |
Method and apparatus for autoranging, quadrature signal generation, digital phase reference, and calibration in a high speed RF measurement receiver |
Jun. 23, 1992 |
| 5117443 |
Method and apparatus for operating at fractional speeds in synchronous systems |
May. 26, 1992 |
| 5109394 |
All digital phase locked loop |
Apr. 28, 1992 |
| 5103465 |
Symbol synchronization circuit |
Apr. 7, 1992 |
| 5099234 |
Switching matrix network for digital audio signals |
Mar. 24, 1992 |
| 5081655 |
Digital phase aligner and method for its operation |
Jan. 14, 1992 |
| 5065412 |
Process and circuit arrangement for digital control of the phase of scanning clock pulses |
Nov. 12, 1991 |
| 5063576 |
Coding and decoding method for asynchronous data signals and an apparatus therefor |
Nov. 5, 1991 |
| 5058134 |
Process of synchronizing a receiving modem after a training on data |
Oct. 15, 1991 |
| 5056054 |
Digital phase locked loop utilizing a multi-bit phase error input for control of a stepped clock generator |
Oct. 8, 1991 |
| 5056121 |
Circuit for obtaining accurate timing information from received signal |
Oct. 8, 1991 |
| 5052026 |
Bit synchronizer for short duration burst communications |
Sep. 24, 1991 |
| 5052030 |
Method for synchronizing a clock, generated with the assistance of a counter, to a reference clock |
Sep. 24, 1991 |
| 5050195 |
Narrow range digital clock circuit |
Sep. 17, 1991 |
| 5047877 |
Windowing method of and apparatus for address mark detection |
Sep. 10, 1991 |
| 5046075 |
Method and arrangement for adapting a clock to a plesiochronous data signal and for clocking the data signal with the adapted clock |
Sep. 3, 1991 |
| 5034967 |
Metastable-free digital synchronizer with low phase error |
Jul. 23, 1991 |
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