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Class Information
Number: 375/371
Name: Pulse or digital communications > Synchronizers > Phase displacement, slip or jitter correction
Description: Subject matter which corrects for errors in the time of occurrence of transmitted pulses.


Sub-classes under this class:

Class Number Class Name Patents
375/372 Elastic buffer 398
375/373 Phase locking 700


Patents under this class:
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Patent Number Title Of Patent Date Issued
5553077 Method and device for automatic synchronisation of data bursts Sep. 3, 1996
5553100 Fully digital data separator and frequency multiplier Sep. 3, 1996
5550876 Measuring device for a synchronous transmission system Aug. 27, 1996
5548620 Zero latency synchronized method and apparatus for system having at least two clock domains Aug. 20, 1996
5541961 Digitally controlled high resolution hybrid phase synthesizer Jul. 30, 1996
5539784 Refined timing recovery circuit Jul. 23, 1996
5539785 Jitter/wander reduction circuit for pulse-stuffed, synchronized digital communications Jul. 23, 1996
5537442 Instantaneous phase detecting circuit and clock recovery signal generating circuit incorporated in differential demodulator Jul. 16, 1996
5537446 Smoothing delay-sensitive traffic offered to asynchronous transfer mode networks Jul. 16, 1996
5537448 Switchable PLL circuit with constant amplification gradient Jul. 16, 1996
5537557 Interface between unsynchronised devices Jul. 16, 1996
5535209 Method and apparatus for transporting timed program data using single transport schedule Jul. 9, 1996
5535218 Apparatus and method for limiting jitter in a telecommunications signal which is being mapped in another such signal by temporarily suspending measurement of available data Jul. 9, 1996
5535252 Clock synchronization circuit and clock synchronizing method in baseband demodulator of digital modulation type Jul. 9, 1996
5533072 Digital phase alignment and integrated multichannel transceiver employing same Jul. 2, 1996
5533073 Method and an arrangement for minimizing a phase difference between two datastreams prior to changeover Jul. 2, 1996
5528598 Apparatus and method for limiting jitter in a telecommunications signal Jun. 18, 1996
5528636 Data synchronization device Jun. 18, 1996
5528637 Synchronizing circuit Jun. 18, 1996
5526353 System and method for communication of audio data over a packet-based network Jun. 11, 1996
5526362 Control of receiver station timing for time-stamped data Jun. 11, 1996
5517534 Phase locked loop with reduced phase noise May. 14, 1996
5515362 Digital signal transmission apparatus May. 7, 1996
5515403 Apparatus and method for clock alignment and switching May. 7, 1996
5515404 Data communication systems May. 7, 1996
5512851 Circuit synchronization when switching between multiple clock signals using a variable advance controller Apr. 30, 1996
5513224 Fill level indicator for self-timed fifo Apr. 30, 1996
5511091 Clock synchronization control check system Apr. 23, 1996
5509037 Data phase alignment circuitry Apr. 16, 1996
5509038 Multi-path data synchronizer system and method Apr. 16, 1996
5499274 Fractional bit-leaking clock signal resynchronizer for a high-speed digital communications system Mar. 12, 1996
5495510 Phase synchronization device integrated into the demodulator stage of a receiver of multi-phase modulator signals Feb. 27, 1996
5493570 End of packet detector and resynchronizer for serial data buses Feb. 20, 1996
5491729 Digital phase-locked data recovery circuit Feb. 13, 1996
5488636 Digital data detector Jan. 30, 1996
5487092 System for high-speed synchronization across clock domains Jan. 23, 1996
5487095 Edge detector Jan. 23, 1996
5485484 Digitally implemented phase and lock indicators for a bit synchronizer Jan. 16, 1996
5485490 Method and circuitry for clock synchronization Jan. 16, 1996
5483559 Phase-locked loop device, oscillator, and signal processor Jan. 9, 1996
5481563 Jitter measurement using a statistically locked loop Jan. 2, 1996
5475690 Delay compensated signal propagation Dec. 12, 1995
5475715 Sync data introduction method and system Dec. 12, 1995
5473611 Apparatus and method for limiting jitter caused by pointer movement while mapping one telecommunications signal into another such signal Dec. 5, 1995
5471464 Orthogonal frequency division multiplex demodulation apparatus Nov. 28, 1995
5471511 Digital phase-locked loop arrangement for use in a desynchronizer Nov. 28, 1995
5469477 Method and arrangement for minimizing skew Nov. 21, 1995
5465274 Digital circuit for decoding encoded doppler data Nov. 7, 1995
5461638 Discrete time control loop method for clocking data in an asynchronous channel Oct. 24, 1995
5459753 Method and apparatus for pattern independent phase detection and timing recovery Oct. 17, 1995

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