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Class Information
Number: 375/354
Name: Pulse or digital communications > Synchronizers
Description: Subject matter for synchronizing the operation of the receiving and transmitting mechanisms.


Sub-classes under this class:

Class Number Class Name Patents
375/358 Feedback, receiver to transmitter 246
375/362 Frequency or phase control using synchronizing signal 545
375/356 Network synchronizing more than two stations 710
375/371 Phase displacement, slip or jitter correction 1,394
375/359 Self-synchronizing signal (self-clocking codes, etc.) 305
375/357 Synchronization failure prevention 376
375/355 Synchronizing the sampling time of digital data 1,026


Patents under this class:

Patent Number Title Of Patent Date Issued
7333548 Phase and frequency drift compensation in Orthogonal Frequency Division Multiplexing systems Feb. 19, 2008
7330508 Using clock and data recovery phase adjust to set loop delay of a decision feedback equalizer Feb. 12, 2008
7330488 System, method, and article of manufacture for synchronizing time of day clocks on first and second computers Feb. 12, 2008
7327817 Method and device for providing timing information in a wireless communication system Feb. 5, 2008
7327816 High resolution synthesizer with improved signal purity Feb. 5, 2008
7327815 Method for synchronizing several digital input signals Feb. 5, 2008
7321648 Drift compensation system and method in a clock device of an electronic circuit Jan. 22, 2008
7321642 Synchronization symbol re-insertion for a decision feedback equalizer combined with a trellis decoder Jan. 22, 2008
7319729 Asynchronous interface methods and apparatus Jan. 15, 2008
7319728 Delay locked loop with frequency control Jan. 15, 2008
7319712 Orthogonal code generation apparatus, scrambling code generation apparatus and portable radio terminal using such apparatus Jan. 15, 2008
7317905 Radio-controlled clock and method for gaining time information Jan. 8, 2008
7317773 Double data rate flip-flop Jan. 8, 2008
7315583 Digital subscriber line (DSL) modems supporting high-speed universal serial bus (USB) interfaces and related methods and computer program products Jan. 1, 2008
7313211 Method and apparatus for phase detection Dec. 25, 2007
7313210 System and method for establishing a known timing relationship between two clock signals Dec. 25, 2007
7313209 Method and arrangement to synchronize a multi-carrier transmission system Dec. 25, 2007
7310400 Data recovery device and method Dec. 18, 2007
7310398 Symbol synchronizing device Dec. 18, 2007
7310396 Asynchronous FIFO buffer for synchronizing data transfers between clock domains Dec. 18, 2007
7310393 Method and apparatus for synchronization of the OFDM systems Dec. 18, 2007
7308064 Frame synchronization method based on differential correlation information in satellite communication system Dec. 11, 2007
7308063 Apparatus, and associated method, for effectuating post-FFT correction of fine frequency offset Dec. 11, 2007
7308059 Synchronization of data links in a multiple link receiver Dec. 11, 2007
7308025 Transmitters providing cycle encoded signals Dec. 11, 2007
7308023 Dual function clock signal suitable for host control of synchronous and asynchronous target devices Dec. 11, 2007
7305023 Receivers for cycle encoded signals Dec. 4, 2007
7298806 Method and system for data-aided timing offset estimation for frequency selective fading channels Nov. 20, 2007
7293214 Testable design methodology for clock domain crossing Nov. 6, 2007
7292670 System and method for automatically correcting duty cycle distortion Nov. 6, 2007
7292665 Method and apparatus for reception of data over digital transmission link Nov. 6, 2007
7292664 Process and device for synchronization and codegroup identification in communication systems of the cellular type Nov. 6, 2007
7289588 Apparatus and method for generating a preamble sequence in an OFDM communication system Oct. 30, 2007
7289578 Wireless local area network apparatus Oct. 30, 2007
7287105 Asynchronous-mode sync FIFO having automatic lookahead and deterministic tester operation Oct. 23, 2007
7286623 Plural circuit selection using role reversing control inputs Oct. 23, 2007
7286622 System and method for performing on-chip synchronization of system signals utilizing off-chip harmonic signal Oct. 23, 2007
7283602 Half-rate clock and data recovery circuit Oct. 16, 2007
7283601 Timing signal generating system and receiving circuit for transmitting signals at high speed with less circuitry Oct. 16, 2007
7283598 OFDM receiver apparatus Oct. 16, 2007
7280629 Method and apparatus for receiving data based on tracking zero crossings Oct. 9, 2007
7280628 Data capture for a source synchronous interface Oct. 9, 2007
7280615 Method for making a clear channel assessment in a wireless network Oct. 9, 2007
7280607 Ultra wide bandwidth communications method and system Oct. 9, 2007
7280602 Microwave signal edge detector circuit for improved clock recovery Oct. 9, 2007
7277519 Frequency and phase correction in a phase-locked loop (PLL) Oct. 2, 2007
7275174 Self-aligning data path converter for multiple clock systems Sep. 25, 2007
7274762 Calculation circuit for calculating a sampling phase error Sep. 25, 2007
7274761 Device synchronisation over a network Sep. 25, 2007
7272743 Semiconductor integrated circuit Sep. 18, 2007



 
 
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