 |
|
 |
| |
 |
|
Class Information
Number: 375/354
Name: Pulse or digital communications > Synchronizers
Description: Subject matter for synchronizing the operation of the receiving and transmitting mechanisms.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7391836 |
System and method for synchronous clock re-generation from a non-synchronous interface |
Jun. 24, 2008 |
| 7391835 |
Optimizing synchronization between monitored computer system signals |
Jun. 24, 2008 |
| 7388938 |
Method for bit-byte synchronization in sampling a data string |
Jun. 17, 2008 |
| 7386082 |
Method and related apparatus for searching the syncword of a next frame in an encoded digital signal |
Jun. 10, 2008 |
| 7386081 |
Timing control circuit and method thereof |
Jun. 10, 2008 |
| 7386079 |
Seamless clock |
Jun. 10, 2008 |
| 7382847 |
Programmable sync pulse generator |
Jun. 3, 2008 |
| 7382846 |
Off-symbol correlation technique |
Jun. 3, 2008 |
| 7382844 |
Methods to self-synchronize clocks on multiple chips in a system |
Jun. 3, 2008 |
| 7382843 |
System with a clocked interface |
Jun. 3, 2008 |
| 7382823 |
Channel bonding control logic architecture |
Jun. 3, 2008 |
| 7382803 |
Hybrid high-speed/low-speed output latch in 10 GBPS interface with half rate clock |
Jun. 3, 2008 |
| 7382694 |
Methods to resolve TSF timer ambiguity of IEEE 802.11e schedule element |
Jun. 3, 2008 |
| 7379520 |
Low jitter phase rotator |
May. 27, 2008 |
| 7379517 |
Method and apparatus for signaling characteristics of a transmitted signal |
May. 27, 2008 |
| 7376211 |
High speed early/late discrimination systems and methods for clock and data recovery receivers |
May. 20, 2008 |
| 7372930 |
Method to synchronize data and a transmitter and a receiver realizing said method |
May. 13, 2008 |
| 7372929 |
Closed loop sub-carrier synchronization system |
May. 13, 2008 |
| 7372928 |
Method and system of cycle slip framing in a deserializer |
May. 13, 2008 |
| 7369634 |
Training pattern for a biased clock recovery tracking loop |
May. 6, 2008 |
| 7369633 |
Method and apparatus for providing carrier synchronization in digital broadcast and interactive systems |
May. 6, 2008 |
| 7369623 |
Apparatuses to simultaneously distribute clock signals and data on integrated circuits, interposers, and circuit boards |
May. 6, 2008 |
| 7366938 |
Reset in a system-on-chip circuit |
Apr. 29, 2008 |
| 7366268 |
Selective data inversion in ultra-wide band communications to eliminate line frequencies |
Apr. 29, 2008 |
| 7366267 |
Clock data recovery with double edge clocking based phase detector and serializer/deserializer |
Apr. 29, 2008 |
| 7362835 |
Clock generator circuit and related method for generating output clock signal |
Apr. 22, 2008 |
| 7362834 |
Method and device for synchronizing at least one node of a bus system and a corresponding bus system |
Apr. 22, 2008 |
| 7362833 |
Dynamic special character selection for use in byte alignment circuitry |
Apr. 22, 2008 |
| 7362812 |
Channel tracking using step size based on norm-1 based errors across multiple OFDM symbols |
Apr. 22, 2008 |
| 7362743 |
Method and system for receiving an ultra-wideband signal with a self-adapting number of propagation paths |
Apr. 22, 2008 |
| 7359469 |
Signal delaying device and method for dynamic delaying of a digitally sampled signal |
Apr. 15, 2008 |
| 7359467 |
Method and apparatus for increasing the quality of the receiver synchronization of QAM or CAP modulated modem connection |
Apr. 15, 2008 |
| 7356106 |
Clock and data recovery circuit |
Apr. 8, 2008 |
| 7355378 |
Source synchronous sampling |
Apr. 8, 2008 |
| 7352836 |
System and method of cross-clock domain rate matching |
Apr. 1, 2008 |
| 7352834 |
Code phase synchronization |
Apr. 1, 2008 |
| 7350092 |
Data synchronization arrangement |
Mar. 25, 2008 |
| 7346138 |
Method of operating a message receiver |
Mar. 18, 2008 |
| 7346135 |
Compensation for residual frequency offset, phase noise and sampling phase offset in wireless networks |
Mar. 18, 2008 |
| 7342984 |
Counting clock cycles over the duration of a first character and using a remainder value to determine when to sample a bit of a second character |
Mar. 11, 2008 |
| 7342953 |
Synchronization detection circuit |
Mar. 11, 2008 |
| 7340631 |
Drift-tolerant sync pulse circuit in a sync pulse generator |
Mar. 4, 2008 |
| 7340023 |
Auto baud system and method and single pin communication interface |
Mar. 4, 2008 |
| 7340022 |
Method, a sender, a receiver, an optical network element and a serialized packet format for transmitting packets |
Mar. 4, 2008 |
| 7340021 |
Dynamic phase alignment and clock recovery circuitry |
Mar. 4, 2008 |
| 7339985 |
Zero crossing method of symbol rate and timing estimation |
Mar. 4, 2008 |
| 7339981 |
Shifted training sequences in a communications system |
Mar. 4, 2008 |
| 7339853 |
Time stamping events for fractions of a clock cycle |
Mar. 4, 2008 |
| 7336750 |
Optimal one-shot phase and frequency estimation for timing acquisition |
Feb. 26, 2008 |
| 7336748 |
DDS circuit with arbitrary frequency control clock |
Feb. 26, 2008 |
|
|
|
 |
|
 |
|
| |
Randomly Featured Patents |
|
