| |
 |
|
Class Information
Number: 375/354
Name: Pulse or digital communications > Synchronizers
Description: Subject matter for synchronizing the operation of the receiving and transmitting mechanisms.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7492291 |
Methods and apparatus for interfacing a plurality of encoded serial data streams to a serializer/deserializer circuit |
Feb. 17, 2009 |
| 7489757 |
Clock data recovery circuit |
Feb. 10, 2009 |
| 7489756 |
Slave device with calibration signal generator for synchronous memory system |
Feb. 10, 2009 |
| 7489751 |
Method and apparatus for synchronization of a receiver to a transmitter |
Feb. 10, 2009 |
| 7486754 |
System clock distributing apparatus and system clock distributing method |
Feb. 3, 2009 |
| 7486753 |
Synchronization establishment circuit and synchronization establishment method |
Feb. 3, 2009 |
| 7486752 |
Alignment of clock signal with data signal |
Feb. 3, 2009 |
| 7483483 |
Ultra-wideband communication apparatus and methods |
Jan. 27, 2009 |
| 7480358 |
CDR-based clock synthesis |
Jan. 20, 2009 |
| 7480357 |
System and method for effectuating the transfer of data blocks across a clock boundary |
Jan. 20, 2009 |
| 7477713 |
method for providing automatic adaptation to frequency offsets in high speed serial links |
Jan. 13, 2009 |
| 7477712 |
Adaptable data path for synchronous data transfer between clock domains |
Jan. 13, 2009 |
| 7477711 |
Synchronous undersampling for high-frequency voltage and current measurements |
Jan. 13, 2009 |
| 7477637 |
Apparatus and method for synchronization of multiple data paths and recovery from lost synchronization |
Jan. 13, 2009 |
| 7474720 |
Clock and data recovery method and digital circuit for the same |
Jan. 6, 2009 |
| 7474716 |
Data recovery circuits using oversampling for maverick edge detection/suppression |
Jan. 6, 2009 |
| 7474235 |
Automatic power control system for optical disc drive and method thereof |
Jan. 6, 2009 |
| 7471937 |
System and method for inverting automatic frequency control (AFC) |
Dec. 30, 2008 |
| 7471753 |
Serializer clock synthesizer |
Dec. 30, 2008 |
| 7471752 |
Data transmission synchronization |
Dec. 30, 2008 |
| 7471715 |
Receiver for receiving a spectrum dispersion signal |
Dec. 30, 2008 |
| 7469026 |
Random walk filter timing recovery loop |
Dec. 23, 2008 |
| 7467056 |
Method and apparatus for aligning multiple outputs of an FPGA |
Dec. 16, 2008 |
| 7466787 |
Multi-stage phase detector |
Dec. 16, 2008 |
| 7466784 |
Apparatus and method for controlling a master/slave system via master device synchronization |
Dec. 16, 2008 |
| 7466768 |
IQ imbalance compensation |
Dec. 16, 2008 |
| 7463706 |
System and method for performing on-chip synchronization of system signals utilizing off-chip harmonic signal |
Dec. 9, 2008 |
| 7463702 |
System and method for one-pass blind transport format detection |
Dec. 9, 2008 |
| 7463077 |
Device for generating a periodic clock signal |
Dec. 9, 2008 |
| 7460631 |
Communication system with synchronization alliances |
Dec. 2, 2008 |
| 7460628 |
Synchronous clock generation apparatus and synchronous clock generation method |
Dec. 2, 2008 |
| 7460040 |
High-speed serial interface architecture for a programmable logic device |
Dec. 2, 2008 |
| 7457391 |
Clock and data recovery unit |
Nov. 25, 2008 |
| 7457388 |
Redundant synchronous clock distribution system |
Nov. 25, 2008 |
| 7457387 |
Method for generating transmitter clock |
Nov. 25, 2008 |
| 7457355 |
Method for an equalizer computation in a media system using a data set separator sequence |
Nov. 25, 2008 |
| 7454674 |
Digital jitter detector |
Nov. 18, 2008 |
| 7454543 |
Early high speed serializer-deserializer (HSS)internal receive (Rx) interface for data sampling clock signals on parallel bus |
Nov. 18, 2008 |
| 7453967 |
Serial self-adaptable transmission line |
Nov. 18, 2008 |
| 7453925 |
Phase multi-path mitigation |
Nov. 18, 2008 |
| 7450676 |
Synchronization of data links in a multiple link receiver |
Nov. 11, 2008 |
| 7450675 |
Multi-channel receiver, digital edge tuning circuit and method thereof |
Nov. 11, 2008 |
| 7450616 |
Area efficient serializer implementation for small functional-to-serial clock ratios |
Nov. 11, 2008 |
| 7450535 |
Pulsed signaling multiplexer |
Nov. 11, 2008 |
| 7447931 |
Step time change compensation in an industrial automation network |
Nov. 4, 2008 |
| 7447289 |
Signal timing adjustment device, signal timing adjustment system, signal timing adjustment amount setting program, and storage medium storing the program |
Nov. 4, 2008 |
| 7447287 |
Method and arrangement for choosing a channel coding and interleaving scheme for certain types of packet data connections |
Nov. 4, 2008 |
| 7447256 |
Receiver for receiving a spectrum dispersion signal |
Nov. 4, 2008 |
| 7443938 |
Method and system for synchronization between transmitter and receiver in a communication system |
Oct. 28, 2008 |
| 7443937 |
High resolution digital clock multiplier |
Oct. 28, 2008 |
|
|
|
