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Class Information
Number: 365/72
Name: Static information storage and retrieval > Interconnection arrangements > Transistors or diodes
Description: Subject matter where the interconnected storage elements are transistors or diodes.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7619916 |
8-T SRAM cell circuit, system and method for low leakage current |
Nov. 17, 2009 |
| 7619279 |
Three dimensional flash cell |
Nov. 17, 2009 |
| 7613022 |
Semiconductor memory device and method of forming the same |
Nov. 3, 2009 |
| 7609538 |
Logic process DRAM |
Oct. 27, 2009 |
| 7609554 |
High voltage switching circuit |
Oct. 27, 2009 |
| 7606061 |
SRAM device with a power saving module controlled by word line signals |
Oct. 20, 2009 |
| 7596011 |
Logic process DRAM |
Sep. 29, 2009 |
| 7589990 |
Semiconductor ROM device and manufacturing method thereof |
Sep. 15, 2009 |
| 7583528 |
Magnetic memory device, method for writing into magnetic memory device and method for reading magnetic memory device |
Sep. 1, 2009 |
| 7583530 |
Multi-bit memory technology (MMT) and cells |
Sep. 1, 2009 |
| 7577010 |
Integrated circuits, methods for manufacturing integrated circuits, integrated memory arrays |
Aug. 18, 2009 |
| 7567457 |
Nonvolatile memory array architecture |
Jul. 28, 2009 |
| 7554839 |
Symmetric blocking transient voltage suppressor (TVS) using bipolar transistor base snatch |
Jun. 30, 2009 |
| 7548455 |
Multi-valued logic/memory cells and methods thereof |
Jun. 16, 2009 |
| 7548477 |
Method and apparatus for adapting circuit components of a memory module to changing operating conditions |
Jun. 16, 2009 |
| 7545019 |
Integrated circuit including logic portion and memory portion |
Jun. 9, 2009 |
| 7545669 |
Resistive memory device |
Jun. 9, 2009 |
| 7525868 |
Multiple-port SRAM device |
Apr. 28, 2009 |
| 7518898 |
Semiconductor memory device with strengthened power and method of strengthening power of the same |
Apr. 14, 2009 |
| 7505299 |
Semiconductor memory device |
Mar. 17, 2009 |
| 7505111 |
Exposure apparatus and device manufacturing method |
Mar. 17, 2009 |
| 7489546 |
NAND architecture memory devices and operation |
Feb. 10, 2009 |
| 7486556 |
Semiconductor memory |
Feb. 3, 2009 |
| 7480166 |
Memory cell structure of metal programmable read only memory having bit cells with a shared transistor cell |
Jan. 20, 2009 |
| 7471546 |
Hierarchical six-transistor SRAM |
Dec. 30, 2008 |
| 7471548 |
Structure of static random access memory with stress engineering for stability |
Dec. 30, 2008 |
| 7457142 |
Semiconductor memory device |
Nov. 25, 2008 |
| 7453755 |
Memory cell with high-K antifuse for reverse bias programming |
Nov. 18, 2008 |
| 7447054 |
NBTI-resilient memory cells with NAND gates |
Nov. 4, 2008 |
| 7447062 |
Method and structure for increasing effective transistor width in memory arrays with dual bitlines |
Nov. 4, 2008 |
| 7440350 |
Semiconductor integrated circuit device |
Oct. 21, 2008 |
| 7436690 |
Flat cell read only memory using common contacts for bit lines and virtual ground lines |
Oct. 14, 2008 |
| 7428161 |
Semiconductor memory device with MOS transistors each having floating gate and control gate |
Sep. 23, 2008 |
| 7420832 |
Array split across three-dimensional interconnected chips |
Sep. 2, 2008 |
| 7417883 |
I/O data interconnect reuse as repeater |
Aug. 26, 2008 |
| 7388773 |
Random access memory with a plurality of symmetrical memory cells |
Jun. 17, 2008 |
| 7379317 |
Method of programming, reading and erasing memory-diode in a memory-diode array |
May. 27, 2008 |
| 7376000 |
Memory cells utilizing metal-to-metal capacitors to reduce susceptibility to single event upsets |
May. 20, 2008 |
| 7366044 |
Systems and methods for data transfers between memory cells |
Apr. 29, 2008 |
| 7359266 |
Precharge circuit and method employing inactive weak precharging and equalizing scheme and memory device including the same |
Apr. 15, 2008 |
| 7349273 |
Access circuit and method for allowing external test voltage to be applied to isolated wells |
Mar. 25, 2008 |
| 7345899 |
Memory having storage locations within a common volume of phase change material |
Mar. 18, 2008 |
| 7336518 |
Layout for equalizer and data line sense amplifier employed in a high speed memory device |
Feb. 26, 2008 |
| 7336552 |
Sense amplifier connecting/disconnecting circuit arrangement and method for operating such a circuit arrangement |
Feb. 26, 2008 |
| 7319605 |
Conductive structure for microelectronic devices and methods of fabricating such structures |
Jan. 15, 2008 |
| 7310256 |
Semiconductor memory device |
Dec. 18, 2007 |
| 7310259 |
Access circuit and method for allowing external test voltage to be applied to isolated wells |
Dec. 18, 2007 |
| 7307877 |
Natural analog or multilevel transistor DRAM-cell |
Dec. 11, 2007 |
| 7307871 |
SRAM cell design with high resistor CMOS gate structure for soft error rate improvement |
Dec. 11, 2007 |
| 7304905 |
Throttling memory in response to an internal temperature of a memory device |
Dec. 4, 2007 |
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