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Class Information
Number: 365/63
Name: Static information storage and retrieval > Interconnection arrangements
Description: Subject matter having physical paths by which information is transferred to, from, or between storage elements.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7619945 |
Memory power management |
Nov. 17, 2009 |
| 7619916 |
8-T SRAM cell circuit, system and method for low leakage current |
Nov. 17, 2009 |
| 7619913 |
Device, method and program for managing area information |
Nov. 17, 2009 |
| 7616630 |
Semiconductor memory device |
Nov. 10, 2009 |
| 7616489 |
Memory array segmentation and methods |
Nov. 10, 2009 |
| 7614027 |
Methods for forming a MRAM with non-orthogonal wiring |
Nov. 3, 2009 |
| 7613026 |
Apparatus and methods for optically-coupled memory systems |
Nov. 3, 2009 |
| 7613025 |
Dram cell design with folded digitline architecture and angled active areas |
Nov. 3, 2009 |
| 7613024 |
Local digit line architecture and method for memory devices having multi-bit or low capacitance memory cells |
Nov. 3, 2009 |
| 7613023 |
Memory arrangement, particularly for the non-volatile storage of uncompressed video and/or audio data |
Nov. 3, 2009 |
| 7613022 |
Semiconductor memory device and method of forming the same |
Nov. 3, 2009 |
| 7610447 |
Upgradable memory system with reconfigurable interconnect |
Oct. 27, 2009 |
| 7609550 |
Compact virtual ground diffusion programmable ROM array architecture, system and method |
Oct. 27, 2009 |
| 7609538 |
Logic process DRAM |
Oct. 27, 2009 |
| 7606061 |
SRAM device with a power saving module controlled by word line signals |
Oct. 20, 2009 |
| 7606057 |
Metal line layout in a memory cell |
Oct. 20, 2009 |
| 7606056 |
Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array thereby manufactured |
Oct. 20, 2009 |
| 7606055 |
Memory architecture and cell design employing two access transistors |
Oct. 20, 2009 |
| 7603510 |
Semiconductor device and storage cell having multiple latch circuits |
Oct. 13, 2009 |
| 7602665 |
Semiconductor integrated circuit device |
Oct. 13, 2009 |
| 7602634 |
Dynamic RAM storage techniques |
Oct. 13, 2009 |
| 7602630 |
Configurable inputs and outputs for memory stacking system and method |
Oct. 13, 2009 |
| 7599239 |
Methods and systems for reducing heat flux in memory systems |
Oct. 6, 2009 |
| 7599217 |
Memory cell device and manufacturing method |
Oct. 6, 2009 |
| 7599205 |
Methods and apparatus of stacking DRAMs |
Oct. 6, 2009 |
| 7599167 |
Active balancing circuit modules, systems and capacitor devices |
Oct. 6, 2009 |
| 7596011 |
Logic process DRAM |
Sep. 29, 2009 |
| 7593284 |
Memory emulation using resistivity-sensitive memory |
Sep. 22, 2009 |
| 7593282 |
Memory core with single contacts and semiconductor memory device having the same |
Sep. 22, 2009 |
| 7586786 |
Nonvolatile semiconductor memory |
Sep. 8, 2009 |
| 7583524 |
Nonvolatile semiconductor memory device |
Sep. 1, 2009 |
| 7580316 |
Semiconductor memory device |
Aug. 25, 2009 |
| 7580304 |
Multiple bus charge sharing |
Aug. 25, 2009 |
| 7580273 |
Digital memory with controllable input/output terminals |
Aug. 25, 2009 |
| 7577789 |
Upgradable memory system with reconfigurable interconnect |
Aug. 18, 2009 |
| 7577760 |
Memory systems, modules, controllers and methods using dedicated data and control busses |
Aug. 18, 2009 |
| 7577041 |
Semiconductor memory device and writing method thereof |
Aug. 18, 2009 |
| 7577010 |
Integrated circuits, methods for manufacturing integrated circuits, integrated memory arrays |
Aug. 18, 2009 |
| 7573775 |
Setting threshold voltages of cells in a memory block to reduce leakage in the memory block |
Aug. 11, 2009 |
| 7573745 |
Multiple use memory chip |
Aug. 11, 2009 |
| 7573733 |
Self-identifying stacked die semiconductor components |
Aug. 11, 2009 |
| 7570509 |
Semiconductor device, logic circuit and electronic equipment |
Aug. 4, 2009 |
| 7570504 |
Device and method to reduce wordline RC time constant in semiconductor memory devices |
Aug. 4, 2009 |
| 7567480 |
Semiconductor memory device |
Jul. 28, 2009 |
| 7566941 |
Magnetoresistive memory cell and process for producing the same |
Jul. 28, 2009 |
| 7564726 |
Semiconductor memory device |
Jul. 21, 2009 |
| 7564134 |
Circuit wiring layout in semiconductor memory device and layout method |
Jul. 21, 2009 |
| 7561463 |
Thin film phase-change memory |
Jul. 14, 2009 |
| 7561457 |
Select transistor using buried bit line from core |
Jul. 14, 2009 |
| 7558138 |
Bypass circuit for memory arrays |
Jul. 7, 2009 |
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