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Class Information
Number: 365/51
Name: Static information storage and retrieval > Format or disposition of elements
Description: Subject matter with specific details of the physical or spatial arrangement of the elements.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7619912 |
Memory module decoder |
Nov. 17, 2009 |
| 7616630 |
Semiconductor memory device |
Nov. 10, 2009 |
| 7609538 |
Logic process DRAM |
Oct. 27, 2009 |
| 7606992 |
High performance data rate system for flash devices |
Oct. 20, 2009 |
| 7606057 |
Metal line layout in a memory cell |
Oct. 20, 2009 |
| 7606055 |
Memory architecture and cell design employing two access transistors |
Oct. 20, 2009 |
| 7603510 |
Semiconductor device and storage cell having multiple latch circuits |
Oct. 13, 2009 |
| 7599239 |
Methods and systems for reducing heat flux in memory systems |
Oct. 6, 2009 |
| 7599205 |
Methods and apparatus of stacking DRAMs |
Oct. 6, 2009 |
| 7596047 |
Memory card and control chip capable of supporting various voltage supplies and method of supporting voltages thereof |
Sep. 29, 2009 |
| 7596011 |
Logic process DRAM |
Sep. 29, 2009 |
| 7594123 |
Data recording apparatus and method and data reproducing apparatus and method |
Sep. 22, 2009 |
| 7593246 |
Low cost high density rectifier matrix memory |
Sep. 22, 2009 |
| 7590020 |
Semiconductor memory, semiconductor memory system and method of monitoring dynamic temperature thereof |
Sep. 15, 2009 |
| 7580273 |
Digital memory with controllable input/output terminals |
Aug. 25, 2009 |
| 7577010 |
Integrated circuits, methods for manufacturing integrated circuits, integrated memory arrays |
Aug. 18, 2009 |
| 7573775 |
Setting threshold voltages of cells in a memory block to reduce leakage in the memory block |
Aug. 11, 2009 |
| 7570511 |
Semiconductor memory device having a three-dimensional cell array structure |
Aug. 4, 2009 |
| 7570504 |
Device and method to reduce wordline RC time constant in semiconductor memory devices |
Aug. 4, 2009 |
| 7558124 |
Memory interface to bridge memory buses |
Jul. 7, 2009 |
| 7558096 |
Stacked memory |
Jul. 7, 2009 |
| 7554829 |
Transmission lines for CMOS integrated circuits |
Jun. 30, 2009 |
| 7551468 |
276-pin buffered memory module with enhanced fault tolerance |
Jun. 23, 2009 |
| 7551467 |
Memory device architectures and operation |
Jun. 23, 2009 |
| 7551465 |
Reference cell layout with enhanced RTN immunity |
Jun. 23, 2009 |
| 7548477 |
Method and apparatus for adapting circuit components of a memory module to changing operating conditions |
Jun. 16, 2009 |
| 7548444 |
Memory module and memory device |
Jun. 16, 2009 |
| 7545664 |
Memory system having self timed daisy chained memory chips |
Jun. 9, 2009 |
| 7545651 |
Memory module with a predetermined arrangement of pins |
Jun. 9, 2009 |
| 7542364 |
Semiconductor memory device |
Jun. 2, 2009 |
| 7542321 |
Semiconductor memory device with power supply wiring on the most upper layer |
Jun. 2, 2009 |
| 7542320 |
Semiconductor memory device |
Jun. 2, 2009 |
| 7539036 |
Semiconductor memory device including plurality of memory mats |
May. 26, 2009 |
| 7539033 |
Semiconductor memory device |
May. 26, 2009 |
| 7535743 |
SRAM memory cell protected against current or voltage spikes |
May. 19, 2009 |
| 7532537 |
Memory module with a circuit providing load isolation and memory domain translation |
May. 12, 2009 |
| 7529114 |
Semiconductor memory device |
May. 5, 2009 |
| 7529112 |
276-Pin buffered memory module with enhanced fault tolerance and a performance-optimized pin assignment |
May. 5, 2009 |
| 7525829 |
Semiconductor storage device |
Apr. 28, 2009 |
| 7522442 |
Semiconductor memory device having a plurality of chips and capability of outputting a busy signal |
Apr. 21, 2009 |
| 7522440 |
Data input and data output control device and method |
Apr. 21, 2009 |
| 7518898 |
Semiconductor memory device with strengthened power and method of strengthening power of the same |
Apr. 14, 2009 |
| 7515450 |
Nonvolatile semiconductor storage device |
Apr. 7, 2009 |
| 7499340 |
Semiconductor memory device and defect remedying method thereof |
Mar. 3, 2009 |
| 7495975 |
Memory system including on-die termination unit having inductor |
Feb. 24, 2009 |
| 7495943 |
Semiconductor memory device |
Feb. 24, 2009 |
| 7489579 |
Device and method for controlling refresh rate of memory |
Feb. 10, 2009 |
| 7489546 |
NAND architecture memory devices and operation |
Feb. 10, 2009 |
| 7486532 |
Semiconductor multi-chip package including two semiconductor memory chips having different memory densities |
Feb. 3, 2009 |
| 7483315 |
Techniques for implementing accurate operating current values stored in a database |
Jan. 27, 2009 |
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