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Class Information
Number: 365/206
Name: Static information storage and retrieval > Read/write circuit > Noise suppression
Description: Subject matter having circuits for the cancellation or reduction of noise or spurious signals.










Sub-classes under this class:

Class Number Class Name Patents
365/207 Differential sensing 2,303
365/214 Particular wiring 151
365/211 Temperature compensation 441


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11

Patent Number Title Of Patent Date Issued
6366513 Reduction of noise in memory integrated circuits with dedicate power supply bus and ground bus for sense amplifiers Apr. 2, 2002
6349067 System and method for preventing noise cross contamination between embedded DRAM and system chip Feb. 19, 2002
6335899 Compensation capacitance for minimizing bit line coupling in multiport memory Jan. 1, 2002
6335902 Semiconductor memory device provided with generating means for internal clock signal for special mode Jan. 1, 2002
6320781 Apparatus for minimization of data line coupling in a semiconductor memory device Nov. 20, 2001
6317375 Method and apparatus for reading memory cells of a resistive cross point array Nov. 13, 2001
6310796 Dynamic random access memory device and .mu.BGA package using multiple reference voltage pads Oct. 30, 2001
6307798 Circuit and method for multiple match detection in content addressable memories Oct. 23, 2001
6307768 Bitline twist with equalizer function Oct. 23, 2001
6304479 Shielded bit line architecture for memory arrays Oct. 16, 2001
6301180 Sense amplifier circuit and semiconductor storage device Oct. 9, 2001
6278652 Input initial stage circuit for semiconductor memory Aug. 21, 2001
6275434 Semiconductor memory Aug. 14, 2001
6266288 Methods for reducing the effects of power supply distribution related noise Jul. 24, 2001
6259621 Method and apparatus for minimization of data line coupling in a semiconductor memory device Jul. 10, 2001
6259642 Semiconductor memory device with reduced sensing noise and sensing current Jul. 10, 2001
6259643 Single event upset (SEU) hardened static random access memory cell Jul. 10, 2001
6256247 Differential sense amplifiers for resistive cross point memory cell arrays Jul. 3, 2001
6243311 Digit line architecture for dynamic memory Jun. 5, 2001
6243313 Semiconductor memory device, nonvolatile semiconductor memory device, and their data reading method Jun. 5, 2001
6236606 Row decoded biasing of sense amplifier for improved one's margin May. 22, 2001
6236605 Semiconductor integrated circuit and semiconductor memory device including overdriving sense amplifier May. 22, 2001
6233652 Translation lookaside buffer for multiple page sizes May. 15, 2001
6226212 Semiconductor memory device, nonvolatile semiconductor memory device, and their data reading method May. 1, 2001
6219294 Multiplexed noisy-quiet power busing for improved area efficiencies and pause performance in DRAM memories Apr. 17, 2001
6211692 Method and apparatus for determining the robustness and incident angle sensitivity of memory cells to alpha-particle/cosmic ray induced soft errors Apr. 3, 2001
6209055 Method and apparatus for reducing noise induced among conductive lines Mar. 27, 2001
6205075 Semiconductor memory device capable of reducing the effect of crosstalk noise between main bit lines and virtual main grounding lines Mar. 20, 2001
6195301 Feedback driver for memory array bitline Feb. 27, 2001
6191990 Semiconductor integrated circuit device having stabilizing capacitors connected between power lines of main amplifiers Feb. 20, 2001
6188598 Reducing impact of coupling noise Feb. 13, 2001
6178109 Integrated circuit memory devices having reduced susceptibility to reference voltage signal noise Jan. 23, 2001
6178129 Separate output power supply to reduce output noise for a simultaneous operation Jan. 23, 2001
6157588 Semiconductor memory device having hierarchical word line structure Dec. 5, 2000
6147917 Apparatus and method for noise reduction in DRAM Nov. 14, 2000
6147920 Noise equalized DAC and device capable of equalizing noise in SRAM Nov. 14, 2000
6137737 Method and circuit for rapidly equilibrating paired digit lines of a memory device during testing Oct. 24, 2000
6134174 Semiconductor memory for logic-hybrid memory Oct. 17, 2000
6111804 Methods for reducing the effects of power supply distribution related noise Aug. 29, 2000
6100729 Output circuit, pulse width modulating circuit and semiconductor integrated circuit in which the level of ringing is reduced Aug. 8, 2000
6097620 Multi-value dynamic semiconductor memory device having twisted bit line pairs Aug. 1, 2000
6075726 High speed sensing circuit for a memory device Jun. 13, 2000
6075737 Row decoded biasing of sense amplifier for improved one's margin Jun. 13, 2000
6075735 Semiconductor memory device having reversing logic means Jun. 13, 2000
6072740 Apparatus for reducing the effects of power supply distribution related noise Jun. 6, 2000
6049503 Wordline driving circuit in semiconductor memory Apr. 11, 2000
6049499 Shared electrical supply line for a semiconductor storage device Apr. 11, 2000
6038188 Data transmission circuit, data line driving circuit, amplifying circuit, semiconductor intergrated circuit, and semiconductor memory Mar. 14, 2000
6031769 Data reading circuit for semiconductor memory device Feb. 29, 2000
6032241 Fast RAM for use in an address translation circuit and method of operation Feb. 29, 2000

1 2 3 4 5 6 7 8 9 10 11










 
 
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