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Class Information
Number: 365/206
Name: Static information storage and retrieval > Read/write circuit > Noise suppression
Description: Subject matter having circuits for the cancellation or reduction of noise or spurious signals.










Sub-classes under this class:

Class Number Class Name Patents
365/207 Differential sensing 2,303
365/214 Particular wiring 151
365/211 Temperature compensation 441


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11

Patent Number Title Of Patent Date Issued
4610002 Dynamic memory circuit with improved noise-prevention circuit arrangement for word lines Sep. 2, 1986
4602355 Memory circuit with noise preventing means for word lines Jul. 22, 1986
4556851 Reduction of noise in signal from charge transfer devices Dec. 3, 1985
4435789 Circuit for a read-only memory organized in rows and columns to prevent bit line potentials from dropping Mar. 6, 1984
4420823 Semiconductor memory Dec. 13, 1983
4409678 Semiconductor memory device Oct. 11, 1983
4409677 Semiconductor integrated circuit device Oct. 11, 1983
4406954 Shared quiet line flip-flop Sep. 27, 1983
4404663 Integrated circuit Sep. 13, 1983
4400802 Integrated digital semiconductor circuit Aug. 23, 1983
4398106 On-chip Delta-I noise clamping circuit Aug. 9, 1983
4384346 Thin film magneto-resistive apparatus for effecting readout from magnetic memory devices May. 17, 1983
4375600 Sense amplifier for integrated memory array Mar. 1, 1983
4347588 MOS-Integrated circuit arrangement for suppressing quiescent currents flowing in word line drivers of semiconductor memories Aug. 31, 1982
4339809 Noise protection circuits Jul. 13, 1982
4336465 Reset circuit Jun. 22, 1982
4334310 Noise suppressing bilevel data signal driver circuit arrangement Jun. 8, 1982
4330753 Method and apparatus for recovering a signal from a charge transfer device May. 18, 1982
4312047 Memory array having improved isolation between sense lines Jan. 19, 1982
4291394 Semiconductor memory device having flip-flop circuits Sep. 22, 1981
4259731 Quiet row selection circuitry Mar. 31, 1981
4200917 Quiet column decoder Apr. 29, 1980
4192013 Safety circuits for coupling laddics in cascade Mar. 4, 1980
4168490 Addressable word line pull-down circuit Sep. 18, 1979
4161040 Data-in amplifier for an MISFET memory device having a clamped output except during the write operation Jul. 10, 1979
4129793 High speed true/complement driver Dec. 12, 1978
4114180 Closed loop laser noise elimination for optoelectronic recording Sep. 12, 1978
4104734 Low voltage data retention bias circuitry for volatile memories Aug. 1, 1978
4099263 Buffering for an I.sup.2 L memory cell Jul. 4, 1978
4085458 Random access memory Apr. 18, 1978
4031523 Integrated storage system with parallel connection lines containing a resistor Jun. 21, 1977
3978459 High density MOS memory array Aug. 31, 1976
3958230 Arrangement including a piezo-ferroelectric body May. 18, 1976

1 2 3 4 5 6 7 8 9 10 11










 
 
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