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Class Information
Number: 365/189.05
Name: Static information storage and retrieval > Read/write circuit > Having particular data buffer or latch
Description: Subject matter including a specific detail of a temporary storage circuit for a data signal.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7619942 |
Multi-port memory device having self-refresh mode |
Nov. 17, 2009 |
| 7619941 |
Parallel data storage system |
Nov. 17, 2009 |
| 7619937 |
Semiconductor memory device with reset during a test mode |
Nov. 17, 2009 |
| 7619923 |
Apparatus for reducing leakage in global bit-line architectures |
Nov. 17, 2009 |
| 7619541 |
Remote sensor processing system and method |
Nov. 17, 2009 |
| 7616521 |
Semiconductor memory device selectively enabling address buffer according to data output |
Nov. 10, 2009 |
| 7616511 |
Input/output line sense amplifier and semiconductor memory device using the same |
Nov. 10, 2009 |
| 7616506 |
Systems for complete word line look ahead with efficient data latch assignment in non-volatile memory read operations |
Nov. 10, 2009 |
| 7616505 |
Complete word line look ahead with efficient data latch assignment in non-volatile memory read operations |
Nov. 10, 2009 |
| 7613070 |
Interleaved input signal path for multiplexed input |
Nov. 3, 2009 |
| 7609582 |
Branch target buffer and method of use |
Oct. 27, 2009 |
| 7609578 |
Quad SRAM based one time programmable memory |
Oct. 27, 2009 |
| 7609565 |
External clock tracking pipelined latch scheme |
Oct. 27, 2009 |
| 7609564 |
Systems and techniques for non-volatile memory buffering |
Oct. 27, 2009 |
| 7609553 |
NAND flash memory device with burst read latency function |
Oct. 27, 2009 |
| 7606083 |
Semiconductor memory device with a noise filter and method of controlling the same |
Oct. 20, 2009 |
| 7606082 |
Semiconductor circuit, inverter circuit, semiconductor apparatus, and manufacturing method thereof |
Oct. 20, 2009 |
| 7606054 |
Cache hit logic of cache memory and processor chip having the same |
Oct. 20, 2009 |
| 7603510 |
Semiconductor device and storage cell having multiple latch circuits |
Oct. 13, 2009 |
| 7603493 |
Dynamically setting burst length of memory device by applying signal to at least one external pin during a read or write transaction |
Oct. 13, 2009 |
| 7602656 |
Power supply control circuit and controlling method thereof |
Oct. 13, 2009 |
| 7602653 |
Multimode data buffer and method for controlling propagation delay time |
Oct. 13, 2009 |
| 7602651 |
Semiconductor integrated circuit device |
Oct. 13, 2009 |
| 7602644 |
Memory devices with page buffer having dual registers and method of using the same |
Oct. 13, 2009 |
| 7599222 |
Semiconductor memory device using pipelined-buffer programming and related method |
Oct. 6, 2009 |
| 7596045 |
Design structure for initializing reference cells of a toggle switched MRAM device |
Sep. 29, 2009 |
| 7596021 |
Memory system including MLC flash memory |
Sep. 29, 2009 |
| 7590016 |
Integrated circuit |
Sep. 15, 2009 |
| 7590010 |
Data output circuit in semiconductor memory device |
Sep. 15, 2009 |
| 7589998 |
Non-volatile memory device and method of operation therefor |
Sep. 15, 2009 |
| 7586794 |
Methods of reading data including comparing current and previous section addresses and related devices |
Sep. 8, 2009 |
| 7586793 |
Dynamic column block selection |
Sep. 8, 2009 |
| 7586790 |
Flash memory device and refresh method |
Sep. 8, 2009 |
| 7586771 |
Tree-style and-type match circuit device applied to content addressable memory |
Sep. 8, 2009 |
| 7583549 |
Memory output circuit and method thereof |
Sep. 1, 2009 |
| 7583546 |
Apparatus and method of operating an integrated circuit |
Sep. 1, 2009 |
| 7583541 |
Asynchronous semiconductor memory |
Sep. 1, 2009 |
| 7580313 |
Semiconductor memory device for reducing cell area |
Aug. 25, 2009 |
| 7580309 |
Memory refresh method and system |
Aug. 25, 2009 |
| 7580300 |
Data output circuit of semiconductor memory apparatus |
Aug. 25, 2009 |
| 7580295 |
Semiconductor memory device and memory system including semiconductor memory device |
Aug. 25, 2009 |
| 7580291 |
Data register with efficient erase, program verify, and direct bit-line memory access features |
Aug. 25, 2009 |
| 7580273 |
Digital memory with controllable input/output terminals |
Aug. 25, 2009 |
| 7577055 |
Error detection on programmable logic resources |
Aug. 18, 2009 |
| 7577047 |
Semiconductor memory device |
Aug. 18, 2009 |
| 7577042 |
Method of programming multi-level semiconductor memory device and multi-level semiconductor memory device |
Aug. 18, 2009 |
| 7577041 |
Semiconductor memory device and writing method thereof |
Aug. 18, 2009 |
| 7577040 |
Dual port memory device with reduced coupling effect |
Aug. 18, 2009 |
| 7577039 |
Memory interface to bridge memory buses |
Aug. 18, 2009 |
| 7577029 |
Multi-level cell access buffer with dual function |
Aug. 18, 2009 |
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