| |
 |
|
Class Information
Number: 365/189.01
Name: Static information storage and retrieval > Read/write circuit
Description: Subject matter for inserting, extracting, or handling of an information signal to be stored or retrieved.
Sub-classes under this class:
| Class Number |
Class Name |
Patents |
| 365/204 |
Accelerating charge or discharge |
436 |
| 365/200 |
Bad bit |
2,577 |
| 365/223 |
Bridge |
9 |
| 365/202 |
Complementing/balancing |
374 |
| 365/222 |
Data refresh |
1,758 |
| 365/224 |
Eddy current |
0 |
| 365/217 |
Electron beam |
31 |
| 365/218 |
Erase |
691 |
| 365/205 |
Flip-flop used for sensing |
1,635 |
| 365/190 |
For complementary information |
1,118 |
| 365/225.6 |
Having bipolar circuit element |
147 |
| 365/225.7 |
Having fuse element |
1,172 |
| 365/189.05 |
Having particular data buffer or latch |
2,949 |
| 365/189.11 |
Including level shift or pull-up circuit |
1,254 |
| 365/225.5 |
Including magnetic element |
85 |
| 365/189.09 |
Including reference or bias voltage generator |
2,126 |
| 365/189.06 |
Including signal clamping |
338 |
| 365/189.07 |
Including signal comparison |
1,762 |
| 365/189.08 |
Including specified plural element logic arrangement |
787 |
| 365/225 |
Minor loop |
7 |
| 365/189.02 |
Multiplexing |
865 |
| 365/206 |
Noise suppression |
354 |
| 365/215 |
Optical |
141 |
| 365/220 |
Parallel read/write |
248 |
| 365/189.03 |
Plural use of terminal |
304 |
| 365/203 |
Precharge |
2,487 |
| 365/221 |
Serial read/write |
641 |
| 365/191 |
Signals |
554 |
| 365/189.04 |
Simultaneous operations (e.g., read/write) |
946 |
| 365/219 |
Sipo/piso |
210 |
| 365/201 |
Testing |
3,064 |
| 365/189.12 |
With shift register |
568 |
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7289372 |
Dual-port memory array using shared write drivers and read sense amplifiers |
Oct. 30, 2007 |
| 7289371 |
Semiconductor memory device and electronic equipment |
Oct. 30, 2007 |
| 7289370 |
Methods and apparatus for accessing memory |
Oct. 30, 2007 |
| 7289369 |
DRAM hierarchical data path |
Oct. 30, 2007 |
| 7287119 |
Integrated circuit memory device with delayed write command processing |
Oct. 23, 2007 |
| 7287105 |
Asynchronous-mode sync FIFO having automatic lookahead and deterministic tester operation |
Oct. 23, 2007 |
| 7286431 |
Memory device capable of performing high speed reading while realizing redundancy replacement |
Oct. 23, 2007 |
| 7284090 |
Data managing method for memory apparatus |
Oct. 16, 2007 |
| 7283418 |
Memory device and method having multiple address, data and command buses |
Oct. 16, 2007 |
| 7281090 |
Data managing method for memory apparatus |
Oct. 9, 2007 |
| 7280417 |
System and method for capturing data signals using a data strobe signal |
Oct. 9, 2007 |
| 7280416 |
Nonvolatile memory system |
Oct. 9, 2007 |
| 7280410 |
System and method for mode register control of data bus operating mode and impedance |
Oct. 9, 2007 |
| 7277353 |
Register file |
Oct. 2, 2007 |
| 7277332 |
Method and circuit for elastic storing capable of adapting to high-speed data communications |
Oct. 2, 2007 |
| 7277330 |
Nonvolatile semiconductor memory device having improved redundancy relieving rate |
Oct. 2, 2007 |
| 7277308 |
High performance and low area write precharge technique for CAMs |
Oct. 2, 2007 |
| 7274590 |
Random access memory with stability enhancement and early read elimination |
Sep. 25, 2007 |
| 7269699 |
Method and memory system having mode selection between dual data strobe mode and single data strobe mode with inversion |
Sep. 11, 2007 |
| 7269090 |
Memory access with consecutive addresses corresponding to different rows |
Sep. 11, 2007 |
| 7266009 |
Ferroelectric memory |
Sep. 4, 2007 |
| 7263007 |
Semiconductor memory device using read data bus for writing data during high-speed writing |
Aug. 28, 2007 |
| 7262985 |
Memory |
Aug. 28, 2007 |
| 7259998 |
Method for controlling memories of a plurality of kinds and circuit for controlling memories of a plurality of kinds |
Aug. 21, 2007 |
| 7259989 |
Non-volatile memory device |
Aug. 21, 2007 |
| 7257030 |
Operating a storage component |
Aug. 14, 2007 |
| 7257023 |
Hybrid non-volatile memory device |
Aug. 14, 2007 |
| 7254668 |
Method and apparatus for grouping pages within a block |
Aug. 7, 2007 |
| 7254063 |
Non-volatile semiconductor memory device and method for reading the same |
Aug. 7, 2007 |
| 7251180 |
Semiconductor memory device |
Jul. 31, 2007 |
| 7251168 |
Interface for access to non-volatile memory on an integrated circuit |
Jul. 31, 2007 |
| 7251165 |
Semiconductor flash memory |
Jul. 31, 2007 |
| 7251149 |
Semiconductor memory device provided with a write column selection switch and a read column selection switch separately |
Jul. 31, 2007 |
| 7248538 |
Semiconductor memory device |
Jul. 24, 2007 |
| 7248534 |
Semiconductor memory device |
Jul. 24, 2007 |
| 7248505 |
Flash memory device |
Jul. 24, 2007 |
| 7246215 |
Systolic memory arrays |
Jul. 17, 2007 |
| 7245516 |
Layout method and computer program product |
Jul. 17, 2007 |
| 7242174 |
Digital sensing circuit |
Jul. 10, 2007 |
| 7240233 |
Hybrid parallel/serial bus interface |
Jul. 3, 2007 |
| 7239572 |
Multiport memory |
Jul. 3, 2007 |
| 7239559 |
Methods and apparatus for accessing memory |
Jul. 3, 2007 |
| 7237073 |
Memory system having data inversion and data inversion method for a memory system |
Jun. 26, 2007 |
| 7236408 |
Electronic circuit having variable biasing |
Jun. 26, 2007 |
| 7233542 |
Method and apparatus for address generation |
Jun. 19, 2007 |
| 7233531 |
SRAM cell with horizontal merged devices |
Jun. 19, 2007 |
| 7230869 |
Method and apparatus for accessing contents of memory cells |
Jun. 12, 2007 |
| 7227788 |
Memory management device and memory device |
Jun. 5, 2007 |
| 7227380 |
Synchronous first-in/first-out block memory for a field programmable gate array |
Jun. 5, 2007 |
| 7225306 |
Efficient address generation for Forney's modular periodic interleavers |
May. 29, 2007 |
|
|
|
