| |
 |
|
Class Information
Number: 365/177
Name: Static information storage and retrieval > Systems using particular element > Semiconductive > Bioplar and fet
Description: Subject matter in which bipolar and field effect transistors are used together in a storage system.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7606066 |
Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same |
Oct. 20, 2009 |
| 7593257 |
Memory |
Sep. 22, 2009 |
| 7589992 |
Semiconductor device having three dimensional structure |
Sep. 15, 2009 |
| 7580299 |
Circuit for generating a reference voltage |
Aug. 25, 2009 |
| 7558100 |
Phase change memory devices including memory cells having different phase change materials and related methods and systems |
Jul. 7, 2009 |
| 7554839 |
Symmetric blocking transient voltage suppressor (TVS) using bipolar transistor base snatch |
Jun. 30, 2009 |
| 7539069 |
Semiconductor memory device |
May. 26, 2009 |
| 7539931 |
Storage element for mitigating soft errors in logic |
May. 26, 2009 |
| 7525847 |
Semiconductor device and methods of manufacturing the same |
Apr. 28, 2009 |
| 7499331 |
Semiconductor memory device |
Mar. 3, 2009 |
| 7492632 |
Memory array having a programmable word length, and method of operating same |
Feb. 17, 2009 |
| 7483296 |
Memory device with unipolar and bipolar selectors |
Jan. 27, 2009 |
| 7479654 |
Memory arrays using nanotube articles with reprogrammable resistance |
Jan. 20, 2009 |
| 7477540 |
Bipolar reading technique for a memory cell having an electrically floating body transistor |
Jan. 13, 2009 |
| 7460422 |
Determining history state of data based on state of partially depleted silicon-on-insulator |
Dec. 2, 2008 |
| 7443722 |
Semiconductor device and driving method therefor |
Oct. 28, 2008 |
| 7415245 |
Pulse shaping signals for ultrawideband communication |
Aug. 19, 2008 |
| 7362609 |
Memory cell |
Apr. 22, 2008 |
| 7349273 |
Access circuit and method for allowing external test voltage to be applied to isolated wells |
Mar. 25, 2008 |
| 7336530 |
CMOS pixel with dual gate PMOS |
Feb. 26, 2008 |
| 7324366 |
Non-volatile memory architecture employing bipolar programmable resistance storage elements |
Jan. 29, 2008 |
| 7315466 |
Semiconductor memory device and method for arranging and manufacturing the same |
Jan. 1, 2008 |
| 7310259 |
Access circuit and method for allowing external test voltage to be applied to isolated wells |
Dec. 18, 2007 |
| 7310266 |
Semiconductor device having memory cells implemented with bipolar-transistor-antifuses operating in a first and second mode |
Dec. 18, 2007 |
| 7301803 |
Bipolar reading technique for a memory cell having an electrically floating body transistor |
Nov. 27, 2007 |
| 7286396 |
Bit line selection transistor layout structure |
Oct. 23, 2007 |
| 7280394 |
Field effect devices having a drain controlled via a nanotube switching element |
Oct. 9, 2007 |
| 7259984 |
Multibit metal nanocrystal memories and fabrication |
Aug. 21, 2007 |
| 7242607 |
Diode-based memory including floating-plate capacitor and its applications |
Jul. 10, 2007 |
| 7236408 |
Electronic circuit having variable biasing |
Jun. 26, 2007 |
| 7230846 |
Purge-based floating body memory |
Jun. 12, 2007 |
| 7221608 |
Single NMOS device memory cell and array |
May. 22, 2007 |
| 7211843 |
System and method for programming a memory cell |
May. 1, 2007 |
| 7187581 |
Semiconductor memory device and method of operating same |
Mar. 6, 2007 |
| 7180767 |
Multi-level memory device and methods for programming and reading the same |
Feb. 20, 2007 |
| 7164597 |
Computer systems |
Jan. 16, 2007 |
| 7154778 |
Nanocrystal write once read only memory for archival storage |
Dec. 26, 2006 |
| 7130212 |
Field effect device with a channel with a switchable conductivity |
Oct. 31, 2006 |
| 7116573 |
Switching element method of driving switching element rewritable logic integrated circuit and memory |
Oct. 3, 2006 |
| 7116570 |
Access circuit and method for allowing external test voltage to be applied to isolated wells |
Oct. 3, 2006 |
| 7113426 |
Non-volatile RAM cell and array using nanotube switch position for information state |
Sep. 26, 2006 |
| 7113425 |
Nonvolatile semiconductor memory device with scalable two transistor memory cells |
Sep. 26, 2006 |
| 7092273 |
Low voltage non-volatile memory transistor |
Aug. 15, 2006 |
| 7057926 |
Semiconductor memory and FBC memory cell driving method |
Jun. 6, 2006 |
| 7057927 |
Floating-body dynamic random access memory with purge line |
Jun. 6, 2006 |
| 7031203 |
Floating-body DRAM using write word line for increased retention time |
Apr. 18, 2006 |
| 7031898 |
Mechanism for recognizing and abstracting memory structures |
Apr. 18, 2006 |
| 7026692 |
Low voltage non-volatile memory transistor |
Apr. 11, 2006 |
| 7027316 |
Access circuit and method for allowing external test voltage to be applied to isolated wells |
Apr. 11, 2006 |
| 7023751 |
Method and circuit for reducing DRAM refresh power by reducing access transistor sub threshold leakage |
Apr. 4, 2006 |
|
|
|
