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Class Information
Number: 365/156
Name: Static information storage and retrieval > Systems using particular element > Flip-flop (electrical) > Complementary
Description: Subject matter employing devices having complementary (pnp and npn) conductivity components.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7626850 |
Systems and devices for implementing sub-threshold memory devices |
Dec. 1, 2009 |
| 7626853 |
Method of operating memory cell providing internal power switching |
Dec. 1, 2009 |
| 7626855 |
Semiconductor memory device |
Dec. 1, 2009 |
| 7619916 |
8-T SRAM cell circuit, system and method for low leakage current |
Nov. 17, 2009 |
| 7619947 |
Integrated circuit having a supply voltage controller capable of floating a variable supply voltage |
Nov. 17, 2009 |
| 7613030 |
Semiconductor memory device and method for operating the same |
Nov. 3, 2009 |
| 7613050 |
Sense-amplifier assist (SAA) with power-reduction technique |
Nov. 3, 2009 |
| 7613054 |
SRAM device with enhanced read/write operations |
Nov. 3, 2009 |
| 7605447 |
Highly manufacturable SRAM cells in substrates with hybrid crystal orientation |
Oct. 20, 2009 |
| 7606060 |
Eight transistor SRAM cell with improved stability requiring only one word line |
Oct. 20, 2009 |
| 7602635 |
Structure for a configurable SRAM system and method |
Oct. 13, 2009 |
| 7599214 |
Semiconductor memory device |
Oct. 6, 2009 |
| 7598544 |
Hybrid carbon nanotude FET(CNFET)-FET static RAM (SRAM) and method of making same |
Oct. 6, 2009 |
| 7596013 |
Semiconductor integrated circuit and manufacturing method therefor |
Sep. 29, 2009 |
| 7596040 |
Methods and apparatus for improved write characteristics in a low voltage SRAM |
Sep. 29, 2009 |
| 7593252 |
Semiconductor apparatus having shield line provided between internal layer and input/output line in layout cell |
Sep. 22, 2009 |
| 7583526 |
Random access memory including nanotube switching elements |
Sep. 1, 2009 |
| 7573775 |
Setting threshold voltages of cells in a memory block to reduce leakage in the memory block |
Aug. 11, 2009 |
| 7570509 |
Semiconductor device, logic circuit and electronic equipment |
Aug. 4, 2009 |
| 7558112 |
SRAM cell controlled by flash memory cell |
Jul. 7, 2009 |
| 7558104 |
Power saving in memory arrays |
Jul. 7, 2009 |
| 7545670 |
Dual word line or floating bit line low power SRAM |
Jun. 9, 2009 |
| 7542368 |
Semiconductor memory device |
Jun. 2, 2009 |
| 7542341 |
MIS-transistor-based nonvolatile memory device with verify function |
Jun. 2, 2009 |
| 7542334 |
Bistable latch circuit implemented with nanotube-based switching elements |
Jun. 2, 2009 |
| 7542333 |
Logic cell protected against random events |
Jun. 2, 2009 |
| 7542330 |
SRAM with asymmetrical pass gates |
Jun. 2, 2009 |
| 7539931 |
Storage element for mitigating soft errors in logic |
May. 26, 2009 |
| 7535750 |
Asymmetrical random access memory cell, and a memory comprising asymmetrical memory cells |
May. 19, 2009 |
| 7535782 |
Sense amplifier circuit and method for a DRAM |
May. 19, 2009 |
| 7532536 |
Semiconductor memory device |
May. 12, 2009 |
| 7529118 |
Generalized interlocked register cell (GICE) |
May. 5, 2009 |
| 7525835 |
Method and apparatus for reduced power cell |
Apr. 28, 2009 |
| 7525836 |
Non-imprinting memory with high speed erase |
Apr. 28, 2009 |
| 7515452 |
Interleaved memory cell with single-event-upset tolerance |
Apr. 7, 2009 |
| 7515489 |
SRAM having active write assist for improved operational margins |
Apr. 7, 2009 |
| 7505304 |
Fault tolerant asynchronous circuits |
Mar. 17, 2009 |
| 7498637 |
Semiconductor memory |
Mar. 3, 2009 |
| 7492628 |
Computer-readable medium encoding a memory using a back-gate controlled asymmetrical memory cell |
Feb. 17, 2009 |
| 7492627 |
Memory with increased write margin bitcells |
Feb. 17, 2009 |
| 7489539 |
Semiconductor memory device |
Feb. 10, 2009 |
| 7489540 |
Bitcell with variable-conductance transfer gate and method thereof |
Feb. 10, 2009 |
| 7486544 |
Semiconductor integrated circuit device |
Feb. 3, 2009 |
| 7486543 |
Asymmetrical SRAM device and method of manufacturing the same |
Feb. 3, 2009 |
| 7486541 |
Resistive cell structure for reducing soft error rate |
Feb. 3, 2009 |
| 7480169 |
Ideal CMOS SRAM system implementation |
Jan. 20, 2009 |
| 7480192 |
Pull-up voltage circuit |
Jan. 20, 2009 |
| 7477566 |
Multi-port semiconductor memory |
Jan. 13, 2009 |
| 7474553 |
Device writing to a plurality of rows in a memory matrix simultaneously |
Jan. 6, 2009 |
| 7471548 |
Structure of static random access memory with stress engineering for stability |
Dec. 30, 2008 |
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