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Class Information
Number: 365/156
Name: Static information storage and retrieval > Systems using particular element > Flip-flop (electrical) > Complementary
Description: Subject matter employing devices having complementary (pnp and npn) conductivity components.










Patents under this class:

Patent Number Title Of Patent Date Issued
8705305 Sense amplifier scheme for low voltage SRAM and register files Apr. 22, 2014
8705268 Quantifying the read and write margins of memory bit cells Apr. 22, 2014
8693235 Methods and apparatus for finFET SRAM arrays in integrated circuits Apr. 8, 2014
8681534 Dual port register file memory cell with reduced susceptibility to noise during same row access Mar. 25, 2014
8675398 Volatile memory elements with soft error upset immunity Mar. 18, 2014
8675397 Cell structure for dual-port SRAM Mar. 18, 2014
8670266 Non-volatile flip-flop Mar. 11, 2014
8670265 Reducing power in SRAM using supply voltage control Mar. 11, 2014
8659937 Implementing low power write disabled local evaluation for SRAM Feb. 25, 2014
8654575 Disturb-free static random access memory cell Feb. 18, 2014
8654572 10T SRAM cell with near dual port functionality Feb. 18, 2014
8654570 Low voltage write time enhanced SRAM cell and circuit extensions Feb. 18, 2014
8654569 10T SRAM cell with near dual port functionality Feb. 18, 2014
8654568 10T SRAM cell with near dual port functionality Feb. 18, 2014
8644054 Circuit Feb. 4, 2014
8638620 Random access memory for use in an emulation environment Jan. 28, 2014
8638595 Global bit select circuit with write around capability Jan. 28, 2014
8638594 Integrated circuits with asymmetric transistors Jan. 28, 2014
8638592 Dual port static random access memory cell Jan. 28, 2014
8638591 TFET based 4T memory devices Jan. 28, 2014
8619464 Static random-access memory having read circuitry with capacitive storage Dec. 31, 2013
8611143 Memory circuit using spin MOSFETs, path transistor circuit with memory function, switching box circuit, switching block circuit, and field programmable gate array Dec. 17, 2013
8611138 Circuits and methods for hardening volatile memory circuits through one time programming Dec. 17, 2013
8611137 Memory elements with relay devices Dec. 17, 2013
8605491 Multiple-port SRAM device Dec. 10, 2013
8605490 Non-volatile SRAM cell that incorporates phase-change memory into a CMOS process Dec. 10, 2013
8598908 Built in system bus interface for random access to programmable logic registers Dec. 3, 2013
8593890 Implementing supply and source write assist for SRAM arrays Nov. 26, 2013
8593861 Asymmetric memory cells Nov. 26, 2013
8587995 Semiconductor device Nov. 19, 2013
8587992 Data-aware SRAM systems and methods forming same Nov. 19, 2013
8587991 Recycling charges Nov. 19, 2013
8582352 Methods and apparatus for FinFET SRAM cells Nov. 12, 2013
8576653 Hidden refresh method and operating method for pseudo SRAM Nov. 5, 2013
8576613 SRAM devices and methods of manufacturing the same Nov. 5, 2013
8576612 Low leakage high performance static random access memory cell using dual-technology transistors Nov. 5, 2013
8575697 SRAM-type memory cell Nov. 5, 2013
8570799 Magnetic random access memory with conversion circuitry Oct. 29, 2013
8570791 Circuit and method of word line suppression Oct. 29, 2013
8559250 Semiconductor memory device capable of correcting the offset voltage of a sense amplifier Oct. 15, 2013
8552763 Switch array including active regions being adjacent to each other in channel width direction of memory cell transistor Oct. 8, 2013
8542545 Repairing soft failures in memory cells in SRAM arrays Sep. 24, 2013
8537603 SRAM cell Sep. 17, 2013
8537602 5T SRAM memory for low voltage applications Sep. 17, 2013
8531873 Ultra low power SRAM cell circuit with a supply feedback loop for near and sub threshold operation Sep. 10, 2013
8526220 Complementary SOI lateral bipolar for SRAM in a low-voltage CMOS platform Sep. 3, 2013
8526219 Enhanced static random access memory stability using asymmetric access transistors and design structure for same Sep. 3, 2013
8526218 Memory design Sep. 3, 2013
8520454 SRAM device capable of independently controlling a double-gate selection transistor for maintaining an optimal read margin and read speed Aug. 27, 2013
8520430 Nanowire circuits in matched devices Aug. 27, 2013











 
 
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