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Class Information
Number: 345/531
Name: Computer graphics processing, operator interface processing, and selective visual display systems > Computer graphics display memory system > Graphic display memory controller
Description: Subject matter including means for controlling the read/write operations of the graphics display memory.










Sub-classes under this class:

Class Number Class Name Patents
345/534 Memory access timing signals 204
345/535 Memory arbitration 180
345/532 Plural memory controllers 117
345/533 Using different access modes 111


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Patent Number Title Of Patent Date Issued
5604917 IC memory card having masking function for preventing writing of data into a fixed memory area Feb. 18, 1997
5602983 Image display system using a common video memory for phased terminals Feb. 11, 1997
5598188 Memory architecture for reformatting and storing display data in standard TV and HDTV systems Jan. 28, 1997
5592237 High resolution image processor with multiple bus architecture Jan. 7, 1997
5583822 Single chip controller-memory device and a memory architecture and methods suitable for implementing the same Dec. 10, 1996
5581310 Architecture for a high definition video frame memory and an accompanying data organization for use therewith and efficient access therefrom Dec. 3, 1996
5568165 Video processing technique using multi-buffer video memory Oct. 22, 1996
5559952 Display controller incorporating cache memory dedicated for VRAM Sep. 24, 1996
5559951 Page printer controller including a single chip superscalar microprocessor with graphics functional units Sep. 24, 1996
5557733 Caching FIFO and method therefor Sep. 17, 1996
5553220 Managing audio data using a graphics display controller Sep. 3, 1996
5548709 Apparatus and method for integrating texture memory and interpolation logic in a computer system Aug. 20, 1996
5544306 Flexible dram access in a frame buffer memory and system Aug. 6, 1996
5539430 Pipelined read write operations in a high speed frame buffer system Jul. 23, 1996
5539428 Video font cache Jul. 23, 1996
5537128 Shared memory for split-panel LCD display systems Jul. 16, 1996
5533187 Multiple block mode operations in a frame buffer system designed for windowing operations Jul. 2, 1996
5530458 Image memory control device Jun. 25, 1996
5530792 Data processing apparatus utilizing CPU Jun. 25, 1996
5530457 Partitioned display apparatus Jun. 25, 1996
5526025 Method and apparatus for performing run length tagging for increased bandwidth in dynamic data repetitive memory systems Jun. 11, 1996
5526502 Memory interface Jun. 11, 1996
5521613 Display controller May. 28, 1996
5517609 Graphics display system using tiles of data May. 14, 1996
5493644 Polygon span interpolator with main memory Z buffer Feb. 20, 1996
5493646 Pixel block transfer with transparency Feb. 20, 1996
5493645 Controller for accessing an image data memory based on a state of a hard copy printer Feb. 20, 1996
5491498 Digital audio delivery in a graphics controller architecture Feb. 13, 1996
5488389 Display device Jan. 30, 1996
5488384 Display control system for determining connection of optional display unit by using palette Jan. 30, 1996
5480236 Line memory controller for printer and method thereof Jan. 2, 1996
5479607 Video data processing system Dec. 26, 1995
5477242 Display adapter for virtual VGA support in XGA native mode Dec. 19, 1995
5475437 Double scan circuit for inserting a new scan line between adjacent scan lines of a television Dec. 12, 1995
5473573 Single chip controller-memory device and a memory architecture and methods suitable for implementing the same Dec. 5, 1995
5471577 Displaying a subsampled video image on a computer display Nov. 28, 1995
5459490 Image processing apparatus Oct. 17, 1995
5459508 Image processing apparatus Oct. 17, 1995
5457475 Image display control apparatus Oct. 10, 1995
5457481 Memory system for use in a moving image decoding processor employing motion compensation technique Oct. 10, 1995
5454076 Method and apparatus for simultaneously minimizing storage and maximizing total memory bandwidth for a repeating pattern Sep. 26, 1995
5450549 Multi-channel image array buffer and switching network Sep. 12, 1995
5448257 Frame buffer with matched frame rate Sep. 5, 1995
5446839 Method for controlling dataflow between a plurality of circular buffers Aug. 29, 1995
5446496 Frame rate conversion with asynchronous pixel clocks Aug. 29, 1995
5428741 High speed image preprocessing system including a multi-purpose buffer for storing digital image data and data cropping means for selectively cropping the digital image data Jun. 27, 1995
5428725 System for performing coordinate transformation of source image data Jun. 27, 1995
5420608 Frame buffer organization and control for real-time image decompression May. 30, 1995
5420969 Apparatus using mean value image smoothing for a two-dimensional image signal May. 30, 1995
5392392 Parallel polygon/pixel rendering engine Feb. 21, 1995

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