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Class Information
Number: 327/162
Name: Miscellaneous active electrical nonlinear devices, circuits, and systems > Signal converting, shaping, or generating > Synchronizing > Having reference source
Description: Subject matter wherein a clock is used as a standard.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7602226 |
Method and apparatus for clock generation |
Oct. 13, 2009 |
| 7592847 |
Phase frequency detector and phase-locked loop |
Sep. 22, 2009 |
| 7558692 |
Consumption current balance circuit, compensation current amount adjusting method, timing generator, and semiconductor testing apparatus |
Jul. 7, 2009 |
| 7541848 |
PLL circuit |
Jun. 2, 2009 |
| 7514974 |
Method and apparatus for adjusting on-chip delay with power supply control |
Apr. 7, 2009 |
| 7478256 |
Coordinating data synchronous triggers on multiple devices |
Jan. 13, 2009 |
| 7447106 |
Delay stage-interweaved analog DLL/PLL |
Nov. 4, 2008 |
| 7443213 |
Staged locking of two phase locked loops |
Oct. 28, 2008 |
| 7424046 |
Spread spectrum clock signal generation system and method |
Sep. 9, 2008 |
| 7421048 |
System and method for multimedia delivery in a wireless environment |
Sep. 2, 2008 |
| 7402821 |
Application of digital frequency and phase synthesis for control of electrode voltage phase in a high-energy ion implantation machine, and a means for accurate calibration of electrode voltage |
Jul. 22, 2008 |
| 7352217 |
Lock phase circuit |
Apr. 1, 2008 |
| 7349510 |
Apparatus for data recovery in a synchronous chip-to-chip system |
Mar. 25, 2008 |
| 7310010 |
Duty cycle corrector |
Dec. 18, 2007 |
| 7295053 |
Delay-locked loop circuits |
Nov. 13, 2007 |
| 7253671 |
Apparatus and method for compensating for clock drift in downhole drilling components |
Aug. 7, 2007 |
| 7248661 |
Data transfer between phase independent clock domains |
Jul. 24, 2007 |
| 7176738 |
Method and apparatus for clock generation |
Feb. 13, 2007 |
| 7171323 |
Integrated circuit having clock trim circuitry |
Jan. 30, 2007 |
| 7149145 |
Delay stage-interweaved analog DLL/PLL |
Dec. 12, 2006 |
| 7145373 |
Frequency-controlled DLL bias |
Dec. 5, 2006 |
| 7106113 |
Adjustment and calibration system for post-fabrication treatment of phase locked loop input receiver |
Sep. 12, 2006 |
| 7096137 |
Clock trim mechanism for onboard system clock |
Aug. 22, 2006 |
| 7091795 |
Modulating ramp angle in a digital frequency locked loop |
Aug. 15, 2006 |
| 7079611 |
System and method for synchronizing an asynchronous frequency for use in a digital system |
Jul. 18, 2006 |
| 7050467 |
Digital-to-phase-converter |
May. 23, 2006 |
| 7002415 |
Frequency locked loop |
Feb. 21, 2006 |
| 6985016 |
Precision closed loop delay line for wide frequency data recovery |
Jan. 10, 2006 |
| 6982578 |
Digital delay-locked loop circuits with hierarchical delay adjustment |
Jan. 3, 2006 |
| 6976184 |
Clock forward initialization and reset signaling technique |
Dec. 13, 2005 |
| 6956419 |
Fail-safe zero delay buffer with automatic internal reference |
Oct. 18, 2005 |
| 6954091 |
Programmable phase-locked loop |
Oct. 11, 2005 |
| 6952124 |
Phase locked loop circuit with self adjusted tuning hiep the pham |
Oct. 4, 2005 |
| 6900683 |
Apparatus and method for generating a predetermined time delay in a semiconductor circuit |
May. 31, 2005 |
| 6900676 |
Clock generator for generating accurate and low-jitter clock |
May. 31, 2005 |
| 6891417 |
Circuits and methods for alignment of signals in integrated circuits |
May. 10, 2005 |
| 6873195 |
Compensating for differences between clock signals |
Mar. 29, 2005 |
| 6862332 |
Clock reproduction circuit |
Mar. 1, 2005 |
| 6836167 |
Techniques to control signal phase |
Dec. 28, 2004 |
| 6809564 |
Clock generator for an integrated circuit with a high-speed serial interface |
Oct. 26, 2004 |
| 6791380 |
Universal clock generator |
Sep. 14, 2004 |
| 6792060 |
Processor having an adaptable operational frequency |
Sep. 14, 2004 |
| 6768362 |
Fail-safe zero delay buffer with automatic internal reference |
Jul. 27, 2004 |
| 6690224 |
Architecture of a PLL with dynamic frequency control on a PLD |
Feb. 10, 2004 |
| 6670833 |
Multiple VCO phase lock loop architecture |
Dec. 30, 2003 |
| 6631273 |
Method and apparatus for filter selection from a frequency synthesizer data |
Oct. 7, 2003 |
| 6628156 |
Integrated circuit having a timing circuit, and method for adjustment of an output signal from the timing circuit |
Sep. 30, 2003 |
| 6580775 |
Method of detecting frequency of digital phase locked loop |
Jun. 17, 2003 |
| 6570946 |
One-hot decoded phase shift prescaler |
May. 27, 2003 |
| 6570944 |
Apparatus for data recovery in a synchronous chip-to-chip system |
May. 27, 2003 |
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