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Class Information
Number: 327/155
Name: Miscellaneous active electrical nonlinear devices, circuits, and systems > Signal converting, shaping, or generating > Synchronizing > With feedback
Description: Subject matter wherein a portion of the circuit output is returned to an input.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7619451 |
Techniques for compensating delays in clock signals on integrated circuits |
Nov. 17, 2009 |
| 7620136 |
Clock and data recovery circuit having gain control |
Nov. 17, 2009 |
| 7605624 |
Delay locked loop (DLL) circuit for generating clock signal for memory device |
Oct. 20, 2009 |
| 7602223 |
Delay-locked loop circuit and method of generating multiplied clock therefrom |
Oct. 13, 2009 |
| 7590212 |
System and method for adjusting the phase of a frequency-locked clock |
Sep. 15, 2009 |
| 7576576 |
Switchable PLL circuit |
Aug. 18, 2009 |
| 7567640 |
Phase offset tracking method for tracking a phase offset and device thereof |
Jul. 28, 2009 |
| 7561652 |
High frequency spread spectrum clock generation |
Jul. 14, 2009 |
| 7545900 |
Low jitter and/or fast lock-in clock recovery circuit |
Jun. 9, 2009 |
| 7528638 |
Clock signal distribution with reduced parasitic loading effects |
May. 5, 2009 |
| 7525364 |
Delay control circuit |
Apr. 28, 2009 |
| 7499511 |
Clock recovery systems and methods for adjusting phase offset according to data frequency |
Mar. 3, 2009 |
| 7495488 |
Phase-locked loop circuit, delay-locked loop circuit and method of tuning output frequencies of the same |
Feb. 24, 2009 |
| 7492850 |
Phase locked loop apparatus with adjustable phase shift |
Feb. 17, 2009 |
| 7456673 |
Multi-phase clock generator |
Nov. 25, 2008 |
| 7447106 |
Delay stage-interweaved analog DLL/PLL |
Nov. 4, 2008 |
| 7336110 |
Differential amplitude controlled sawtooth generator |
Feb. 26, 2008 |
| 7319728 |
Delay locked loop with frequency control |
Jan. 15, 2008 |
| 7317775 |
Switched deskew on arbitrary data |
Jan. 8, 2008 |
| 7301375 |
Off-chip driver circuit and data output circuit using the same |
Nov. 27, 2007 |
| 7295053 |
Delay-locked loop circuits |
Nov. 13, 2007 |
| 7227795 |
Data output circuit, data output method, and semiconductor memory device |
Jun. 5, 2007 |
| 7200451 |
Method for consistent on/off object to control radios and other interfaces |
Apr. 3, 2007 |
| 7190200 |
Delay locked loop capable of performing reliable locking operation |
Mar. 13, 2007 |
| 7164295 |
Feedback control system and method |
Jan. 16, 2007 |
| 7161400 |
Phase synchronization for wide area integrated circuits |
Jan. 9, 2007 |
| 7162000 |
Delay locked loop synthesizer with multiple outputs and digital modulation |
Jan. 9, 2007 |
| 7149145 |
Delay stage-interweaved analog DLL/PLL |
Dec. 12, 2006 |
| 7138850 |
High-gain synchronizer circuitry and methods |
Nov. 21, 2006 |
| 7127022 |
Clock and data recovery circuits utilizing digital delay lines and digitally controlled oscillators |
Oct. 24, 2006 |
| 7120217 |
Phase-locked loop circuit |
Oct. 10, 2006 |
| 7116320 |
Display device, method of controlling the same, and projection-type display apparatus |
Oct. 3, 2006 |
| 7110485 |
System and method for clock synchronization of multi-channel baud-rate timing recovery systems |
Sep. 19, 2006 |
| 7098708 |
Low-power direct digital synthesizer with analog interpolation |
Aug. 29, 2006 |
| 7073001 |
Fault-tolerant digital communications channel having synchronized unidirectional links |
Jul. 4, 2006 |
| 7042296 |
Digital programmable delay scheme to continuously calibrate and track delay over process, voltage and temperature |
May. 9, 2006 |
| 7016259 |
Apparatus for calibrating the relative phase of two reception signals of a memory chip |
Mar. 21, 2006 |
| 6999480 |
Method and apparatus for improving data integrity and desynchronizer recovery time after a loss of signal |
Feb. 14, 2006 |
| 6982578 |
Digital delay-locked loop circuits with hierarchical delay adjustment |
Jan. 3, 2006 |
| 6973293 |
Apparatus and method for compensating for the offset of a mixer |
Dec. 6, 2005 |
| 6972603 |
Maximum time interval error test signal generating apparatus not affected by low-pass measuring filter |
Dec. 6, 2005 |
| 6958635 |
Low-power direct digital synthesizer with analog interpolation |
Oct. 25, 2005 |
| 6906555 |
Prevention of metastability in bistable circuits |
Jun. 14, 2005 |
| 6861884 |
Phase synchronization for wide area integrated circuits |
Mar. 1, 2005 |
| 6842398 |
Multi-mode synchronous memory device and methods of operating and testing same |
Jan. 11, 2005 |
| 6839301 |
Method and apparatus for improving stability and lock time for synchronous circuits |
Jan. 4, 2005 |
| 6829309 |
Phase detector for baud rate-sampled multi-state signal receiver |
Dec. 7, 2004 |
| 6815988 |
Differential charge pump |
Nov. 9, 2004 |
| 6812753 |
System and method for skew compensating a clock signal and for capturing a digital signal using the skew compensated clock signal |
Nov. 2, 2004 |
| 6789055 |
Timing verification checking value extracting method |
Sep. 7, 2004 |
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