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Class Information
Number: 326/94
Name: Electronic digital logic circuitry > Clocking or synchronizing of logic stages or gates > Metastable state prevention
Description: Subject matter including a circuit to prevent the occurrence of an undecided condition at a logic state transition.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7626420 |
Method, apparatus, and system for synchronously resetting logic circuits |
Dec. 1, 2009 |
| 7484023 |
Computer system apparatus for stabilizing asynchronous interfaces |
Jan. 27, 2009 |
| 7454589 |
Data buffer circuit, interface circuit and control method therefor |
Nov. 18, 2008 |
| 7383370 |
Arbiter circuit and signal arbitration method |
Jun. 3, 2008 |
| 7359468 |
Apparatus for synchronizing clock and data between two domains having unknown but coherent phase |
Apr. 15, 2008 |
| 7340541 |
Method of buffering bidirectional digital I/O lines |
Mar. 4, 2008 |
| 7337345 |
Input circuit for an electronic circuit and a method for controlling the reading-in of a data signal |
Feb. 26, 2008 |
| 7288969 |
Zero clock delay metastability filtering circuit |
Oct. 30, 2007 |
| 7230985 |
Look-ahead decision feedback equalizing receiver |
Jun. 12, 2007 |
| 7225283 |
Asynchronous arbiter with bounded resolution time and predictable output state |
May. 29, 2007 |
| 7202704 |
Leakage sensing and keeper circuit for proper operation of a dynamic circuit |
Apr. 10, 2007 |
| 7180332 |
Clock synchronization circuit |
Feb. 20, 2007 |
| 7132858 |
Logic circuit |
Nov. 7, 2006 |
| 7106091 |
Circuit configuration and method for detecting an unwanted attack on an integrated circuit |
Sep. 12, 2006 |
| 7095252 |
Charge sharing reduction by applying intrinsic parallelism in complex dynamic domino type CMOS gates |
Aug. 22, 2006 |
| 7091742 |
Fast ring-out digital storage circuit |
Aug. 15, 2006 |
| 7088144 |
Conditional precharge design in staticized dynamic flip-flop with clock enable |
Aug. 8, 2006 |
| 7075336 |
Method for distributing clock signals to flip-flop circuits |
Jul. 11, 2006 |
| 7042250 |
Synchronization of clock signals in a multi-clock domain |
May. 9, 2006 |
| 6995585 |
System and method for implementing self-timed decoded data paths in integrated circuits |
Feb. 7, 2006 |
| 6960941 |
Latch circuit capable of ensuring race-free staging for signals in dynamic logic circuits |
Nov. 1, 2005 |
| 6958627 |
Asynchronous pipeline with latch controllers |
Oct. 25, 2005 |
| 6949955 |
Synchronizing signals between clock domains |
Sep. 27, 2005 |
| 6930522 |
Method and apparatus to delay signal latching |
Aug. 16, 2005 |
| 6927604 |
Clock signal selector circuit with reduced probability of erroneous output due to metastability |
Aug. 9, 2005 |
| 6924682 |
Latch circuit with metastability trap and method therefor |
Aug. 2, 2005 |
| 6906555 |
Prevention of metastability in bistable circuits |
Jun. 14, 2005 |
| 6900665 |
Transfer of digital data across asynchronous clock domains |
May. 31, 2005 |
| 6873188 |
Limited switch dynamic logic selector circuits |
Mar. 29, 2005 |
| 6853218 |
Multiport arbitration using phased locking arbiters |
Feb. 8, 2005 |
| 6831482 |
Control of guard-flops |
Dec. 14, 2004 |
| 6826642 |
Method and apparatus for the use of discriminators for priority arbitration |
Nov. 30, 2004 |
| 6822481 |
Method and apparatus for clock gating clock trees to reduce power dissipation |
Nov. 23, 2004 |
| 6801055 |
Data driven clocking |
Oct. 5, 2004 |
| 6798185 |
Method and apparatus for testing analog to digital converters |
Sep. 28, 2004 |
| 6781429 |
Latch circuit with metastability trap and method therefor |
Aug. 24, 2004 |
| 6781418 |
Arbiter/pulse discriminator circuits with improved metastable failure rate by delayed balance point adjustment |
Aug. 24, 2004 |
| 6781411 |
Flip flop with reduced leakage current |
Aug. 24, 2004 |
| 6772382 |
Driver for integrated circuit chip tester |
Aug. 3, 2004 |
| 6756819 |
Synchronization circuit |
Jun. 29, 2004 |
| 6750677 |
Dynamic semiconductor integrated circuit |
Jun. 15, 2004 |
| 6741096 |
Structure and methods for measurement of arbitration performance |
May. 25, 2004 |
| 6690221 |
Method and apparatus to delay signal latching |
Feb. 10, 2004 |
| 6690203 |
Method and apparatus for a failure-free synchronizer |
Feb. 10, 2004 |
| 6674306 |
Multiport arbitration using phased locking arbiters |
Jan. 6, 2004 |
| 6675331 |
Testable transparent latch and method for testing logic circuitry that includes a testable transparent latch |
Jan. 6, 2004 |
| 6603415 |
Circuits and methods for latch metastability detection and compensation and systems using the same |
Aug. 5, 2003 |
| 6590423 |
Digital circuits exhibiting reduced power consumption |
Jul. 8, 2003 |
| 6552571 |
Clock induced supply noise reduction apparatus for a latch based circuit |
Apr. 22, 2003 |
| 6549030 |
Clock induced supply noise reduction method for a latch based circuit |
Apr. 15, 2003 |
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