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Class Information
Number: 326/93
Name: Electronic digital logic circuitry > Clocking or synchronizing of logic stages or gates
Description: Subject matter wherein individual logic stages or gates are responsive to predetermined time-related signals or periodic signals in addition to an input logic signal.

Sub-classes under this class:

Class Number Class Name Patents
326/95 Field-effect transistor 630
326/94 Metastable state prevention 161

Patents under this class:

Patent Number Title Of Patent Date Issued
8692578 Transmitter employing pulling mitigation mechanism and related method thereof Apr. 8, 2014
8689035 Communication system, communication interface, and synchronization method Apr. 1, 2014
8686756 Time-to-digital converter and digital-controlled clock generator and all-digital clock generator Apr. 1, 2014
8686755 Double data rate clock gating Apr. 1, 2014
8669784 Programmable pulse generator using inverter chain Mar. 11, 2014
8664977 Ultra-low power multi-threshold asynchronous circuit design Mar. 4, 2014
8661285 Dynamically calibrated DDR memory controller Feb. 25, 2014
8625728 System and method for reducing electromagnetic interference and ground bounce in an information communication system by controlling phase of clock signals among a plurality of information comm Jan. 7, 2014
8624623 Apparatus having error detection in sequential logic Jan. 7, 2014
8618837 Multi-stage digitally-controlled power amplifier Dec. 31, 2013
8604833 Integrated circuit device and method of using combinatorial logic in a data processing circuit Dec. 10, 2013
8604832 Time division multiplexed limited switch dynamic logic Dec. 10, 2013
8604831 Integrated circuit, clock gating circuit, and method Dec. 10, 2013
8598910 Timestamping logic with auto-adjust for varying system frequencies Dec. 3, 2013
8593192 Semiconductor device and method for controlling flip-flop Nov. 26, 2013
8593177 Integrated circuit with timing aware clock-tree and method for designing such an integrated circuit Nov. 26, 2013
8593176 One phase logic Nov. 26, 2013
8587338 Method and apparatus for clocking Nov. 19, 2013
8581629 Synchronous state machine with an aperiodic clock Nov. 12, 2013
8581627 High-speed level shifter between low-side logic and high-side logic Nov. 12, 2013
8575965 Internal clock gating apparatus Nov. 5, 2013
8575964 Inactivity triggered self clocking logic family Nov. 5, 2013
8575962 Integrated circuit having critical path voltage scaling and method therefor Nov. 5, 2013
8575957 Multiple data rate interface architecture Nov. 5, 2013
8570069 Clock gating cell circuit Oct. 29, 2013
8564331 Semiconductor device Oct. 22, 2013
8564330 Methods and systems for high frequency clock distribution Oct. 22, 2013
8564326 Circuit and method to control slew rate of a current-mode logic output driver Oct. 22, 2013
8559576 Adaptive synchronization circuit Oct. 15, 2013
8558575 Clock generation for N.5 modulus divider Oct. 15, 2013
8552761 Flip-flop including keeper circuit Oct. 8, 2013
8549342 Method and apparatus for fine edge control on integrated circuit outputs Oct. 1, 2013
8543859 Host detection circuit powered from primary side of the alternating current adaptor for detecting changes to a power level pulse of an information handling system Sep. 24, 2013
8542033 Domino logic circuits and pipelined domino logic circuits Sep. 24, 2013
8525550 Repeater circuit with multiplexer and state element functionality Sep. 3, 2013
8519742 Latch structure, frequency divider, and methods for operating same Aug. 27, 2013
8509367 Receiver interface Aug. 13, 2013
8508255 Method and apparatus for reducing power consumption in a digital circuit by controlling the clock Aug. 13, 2013
8508254 Apparatus for using metastability-hardened storage circuits in logic devices and associated methods Aug. 13, 2013
8508249 Semiconductor integrated circuit and method for designing the same Aug. 13, 2013
8502562 Buffering circuit, semiconductor device having the same, and methods thereof Aug. 6, 2013
8502561 Signal value storage circuitry with transition detector Aug. 6, 2013
8497707 Transmitter equalization method and circuit using unit-size and fractional-size subdrivers in output driver for high-speed serial interface Jul. 30, 2013
8493106 Semiconductor device and method for controlling flip-flop Jul. 23, 2013
8493093 Time division multiplexed limited switch dynamic logic Jul. 23, 2013
8487647 Circuit and method for deglitching an input signal Jul. 16, 2013
8482315 One-of-n N-nary logic implementation of a storage cell Jul. 9, 2013
8476929 Semiconductor device Jul. 2, 2013
8473771 Integrated circuit having frequency dependent noise avoidance Jun. 25, 2013
8471597 Power saving circuit using a clock buffer and multiple flip-flops Jun. 25, 2013

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