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Class Information
Number: 326/52
Name: Electronic digital logic circuitry > Exclusive function (e.g., exclusive or, etc.)
Description: Subject matter including a logic circuit which produces an output signal which is a function of whether or not the inputs are uniformly identical.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7612583 |
Efficient XOR calculation |
Nov. 3, 2009 |
| 7560955 |
Logic circuit |
Jul. 14, 2009 |
| 7554359 |
Circuit for inspecting semiconductor device and inspecting method |
Jun. 30, 2009 |
| 7554356 |
Adding or subtracting inputs using a carry signal with a fixed value of logic 0 |
Jun. 30, 2009 |
| 7482713 |
Switch controller |
Jan. 27, 2009 |
| 7459936 |
Fast/slow state machine latch |
Dec. 2, 2008 |
| 7439770 |
Magnetic tunneling junction based logic circuits and methods of operating the same |
Oct. 21, 2008 |
| 7429872 |
Logic circuit combining exclusive OR gate and exclusive NOR gate |
Sep. 30, 2008 |
| 7408482 |
Integrated circuit devices having data inversion circuits therein with multi-bit prefetch structures and methods of operating same |
Aug. 5, 2008 |
| 7403043 |
Magnetic Transistor Circuit Representing the Data `1` and `0` of the Binary System |
Jul. 22, 2008 |
| 7397277 |
Magnetic transistor circuit with the EXOR function |
Jul. 8, 2008 |
| 7372296 |
Configurable logic device providing enhanced flexibility, scalability and providing area efficient implementation of arithmetic operation on n-bit variables |
May. 13, 2008 |
| 7312634 |
Exclusive-or and/or exclusive-nor circuits including output switches and related methods |
Dec. 25, 2007 |
| 7279936 |
Logic basic cell, logic basic cell arrangement and logic device |
Oct. 9, 2007 |
| 7242219 |
Circuit for parity tree structure |
Jul. 10, 2007 |
| 7231572 |
Method and circuit for parametric testing of integrated circuits with an exclusive-or logic tree |
Jun. 12, 2007 |
| 7222202 |
Method for monitoring a set of semaphore registers using a limited-width test bus |
May. 22, 2007 |
| 7218139 |
Programmable integrated circuit providing efficient implementations of arithmetic functions |
May. 15, 2007 |
| 7187204 |
Circuit for inspecting semiconductor device and inspecting method |
Mar. 6, 2007 |
| 7064583 |
Arbiters with preferential enables for asynchronous circuits |
Jun. 20, 2006 |
| 6992506 |
Integrated circuit devices having data inversion circuits therein with multi-bit prefetch structures and methods of operating same |
Jan. 31, 2006 |
| 6934308 |
Precoding circuit and precoding-mulitplexing circuit for realizing very high transmission rate in optical fiber communication |
Aug. 23, 2005 |
| 6822885 |
High speed latch and compare function |
Nov. 23, 2004 |
| 6819142 |
Circuit for transforming a differential mode signal into a single ended signal with reduced standby current consumption |
Nov. 16, 2004 |
| 6788106 |
Integrated circuit devices having data inversion circuits therein that reduce simultaneous switching noise and support interleaving of parallel data |
Sep. 7, 2004 |
| 6781412 |
Logic circuit for fast carry/borrow |
Aug. 24, 2004 |
| 6772250 |
Boundary scannable one bit precompensated CMOS driver with compensating pulse width control |
Aug. 3, 2004 |
| 6765410 |
Method and apparatus for performing a hazard-free multi-bit comparison |
Jul. 20, 2004 |
| 6700413 |
Symmetric current mode logic |
Mar. 2, 2004 |
| 6686776 |
Digital data coincidence determining circuit |
Feb. 3, 2004 |
| 6566912 |
Integrated XOR/multiplexer for high speed phase detection |
May. 20, 2003 |
| 6469541 |
Exclusive Or/Nor circuit |
Oct. 22, 2002 |
| 6400257 |
High performance CMOS pseudo dynamic bit comparator with bypass function |
Jun. 4, 2002 |
| 6356112 |
Exclusive or/nor circuit |
Mar. 12, 2002 |
| 6304104 |
Method and apparatus for reducing worst case power |
Oct. 16, 2001 |
| 6259274 |
Clock signal generator |
Jul. 10, 2001 |
| 6150836 |
Multilevel logic field programmable device |
Nov. 21, 2000 |
| 6057709 |
Integrated XNOR flip-flop |
May. 2, 2000 |
| 6043686 |
Apparatus and method for transistor element reduction in circuits comparing serial data signals |
Mar. 28, 2000 |
| 5995420 |
Integrated XNOR flip-flop for cache tag comparison |
Nov. 30, 1999 |
| 5986538 |
N-bit comparator |
Nov. 16, 1999 |
| 5973507 |
Exclusive-or gate for use in delay using transmission gate circuitry |
Oct. 26, 1999 |
| 5973532 |
Circuit arrangement for generating two signals staggered in time from a clock signal and for measuring their time stagger |
Oct. 26, 1999 |
| 5966029 |
Multi-bit exclusive or |
Oct. 12, 1999 |
| 5951711 |
Method and device for determining hamming distance between two multi-bit digital words |
Sep. 14, 1999 |
| 5861760 |
Programmable logic device macrocell with improved capability |
Jan. 19, 1999 |
| 5831454 |
Emitter coupled logic (ECL) gate |
Nov. 3, 1998 |
| 5736868 |
Exclusive OR/NOR gate circuit |
Apr. 7, 1998 |
| 5721503 |
Flash analog-to-digital converter with latching exclusive or gates |
Feb. 24, 1998 |
| 5687107 |
Exclusive-OR gate, an inverted type selector, and adders |
Nov. 11, 1997 |
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