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Class Information
Number: 326/41
Name: Electronic digital logic circuitry > Multifunctional or programmable (e.g., universal, etc.) > Array (e.g., pla, pal, pld, etc.) > Significant integrated structure, layout, or layout interconnections
Description: Subject matter including an arrangement of components fabricated in a semiconductor material or integrated circuit chip with significant design emphasis on the topological arrangement of the components and their circuit connectors.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6744278 |
Tileable field-programmable gate array architecture |
Jun. 1, 2004 |
| 6738858 |
Cross-bar matrix for connecting digital resources to I/O pins of an integrated circuit |
May. 18, 2004 |
| 6735755 |
Cost saving methods using pre-defined integrated circuit modules |
May. 11, 2004 |
| 6731133 |
Routing structures for a tileable field-programmable gate array architecture |
May. 4, 2004 |
| 6732263 |
Configuring both a programmable logic device and its embedded logic with a single serialized configuration bit stream |
May. 4, 2004 |
| 6727726 |
Field programmable gate array architecture including a buffer module and a method of distributing buffer modules in a field programmable gate array |
Apr. 27, 2004 |
| 6727727 |
Interconnection resources for programmable logic integrated circuit devices |
Apr. 27, 2004 |
| 6724220 |
Programmable microcontroller architecture (mixed analog/digital) |
Apr. 20, 2004 |
| 6720796 |
Multiple size memories in a programmable logic device |
Apr. 13, 2004 |
| 6717435 |
Programmable logic device and programming method |
Apr. 6, 2004 |
| 6717436 |
Reconfigurable gate array |
Apr. 6, 2004 |
| 6718465 |
Reconfigurable inner product processor architecture implementing square recursive decomposition of partial product matrices |
Apr. 6, 2004 |
| 6714041 |
Programming on-the-fly (OTF) |
Mar. 30, 2004 |
| 6710620 |
Bus interface for I/O device with memory |
Mar. 23, 2004 |
| 6710621 |
Programmable power supply for field programmable gate array modules |
Mar. 23, 2004 |
| 6710623 |
Cascadable bus based crossbar switching in a programmable logic device |
Mar. 23, 2004 |
| 6710625 |
Semiconductor integrated circuit having a gate array structure |
Mar. 23, 2004 |
| 6707314 |
Integrated circuit device, electronic equipment, and method of placement of an integrated circuit device |
Mar. 16, 2004 |
| 6707315 |
Registered logic macrocell with product term allocation and adjacent product term stealing |
Mar. 16, 2004 |
| 6703859 |
Programmable logic device and method of controlling clock signal thereof |
Mar. 9, 2004 |
| 6703860 |
I/O block for a programmable interconnect circuit |
Mar. 9, 2004 |
| 6703861 |
Architecture and interconnect scheme for programmable logic circuits |
Mar. 9, 2004 |
| 6700404 |
Tileable field-programmable gate array architecture |
Mar. 2, 2004 |
| 6701500 |
Logic circuit module, method for designing a semiconductor integrated circuit using the same, and semiconductor integrated circuit |
Mar. 2, 2004 |
| RE38451 |
Universal logic module with arithmetic capabilities |
Mar. 2, 2004 |
| 6696855 |
Symmetric logic block input/output scheme |
Feb. 24, 2004 |
| 6696856 |
Function block architecture with variable drive strengths |
Feb. 24, 2004 |
| 6693454 |
Distributed RAM in a logic array |
Feb. 17, 2004 |
| 6693456 |
Interconnection network for a field programmable gate array |
Feb. 17, 2004 |
| 6690194 |
Function block architecture for gate array |
Feb. 10, 2004 |
| 6690195 |
Driver circuitry for programmable logic devices |
Feb. 10, 2004 |
| 6691267 |
Technique to test an integrated circuit using fewer pins |
Feb. 10, 2004 |
| 6686769 |
Programmable I/O element circuit for high speed logic devices |
Feb. 3, 2004 |
| 6680871 |
Method and apparatus for testing memory embedded in mask-programmable logic device |
Jan. 20, 2004 |
| 6674303 |
Programmable input/output cell with bidirectional and shift register capabilities |
Jan. 6, 2004 |
| 6670825 |
Efficient arrangement of interconnection resources on programmable logic devices |
Dec. 30, 2003 |
| 6670826 |
Configurable logic block with a storage element clocked by a write strobe pulse |
Dec. 30, 2003 |
| 6667634 |
Multi-option setting device for a peripheral control chipset |
Dec. 23, 2003 |
| 6667636 |
DSP integrated with programmable logic based accelerators |
Dec. 23, 2003 |
| 6668237 |
Run-time reconfigurable testing of programmable logic devices |
Dec. 23, 2003 |
| 6664806 |
Memory address and decode circuits with ultra thin body transistors |
Dec. 16, 2003 |
| 6664807 |
Repeater for buffering a signal on a long data line of a programmable logic device |
Dec. 16, 2003 |
| 6664808 |
Method of using partially defective programmable logic devices |
Dec. 16, 2003 |
| 6661253 |
Passgate structures for use in low-voltage applications |
Dec. 9, 2003 |
| 6661254 |
Programmable interconnect circuit with a phase-locked loop |
Dec. 9, 2003 |
| 6657457 |
Data transfer on reconfigurable chip |
Dec. 2, 2003 |
| 6657458 |
Output buffer with feedback from an input buffer to provide selectable PCL, GTL, or PECL compatibility |
Dec. 2, 2003 |
| 6658638 |
Power saving methods for programmable logic arrays |
Dec. 2, 2003 |
| 6653860 |
Enhanced macrocell module having expandable product term sharing capability for use in high density CPLD architectures |
Nov. 25, 2003 |
| 6653861 |
Multi-level routing structure for a programmable interconnect circuit |
Nov. 25, 2003 |
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