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Class Information
Number: 326/41
Name: Electronic digital logic circuitry > Multifunctional or programmable (e.g., universal, etc.) > Array (e.g., pla, pal, pld, etc.) > Significant integrated structure, layout, or layout interconnections
Description: Subject matter including an arrangement of components fabricated in a semiconductor material or integrated circuit chip with significant design emphasis on the topological arrangement of the components and their circuit connectors.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7434192 |
Techniques for optimizing design of a hard intellectual property block for data transmission |
Oct. 7, 2008 |
| 7432735 |
Programmable gate array apparatus and method for switching circuits |
Oct. 7, 2008 |
| 7432734 |
Versatile logic element and logic array block |
Oct. 7, 2008 |
| 7432733 |
Multi-level routing architecture in a field programmable gate array having transmitters and receivers |
Oct. 7, 2008 |
| 7430697 |
Method of testing circuit blocks of a programmable logic device |
Sep. 30, 2008 |
| 7429870 |
Resilient integrated circuit architecture |
Sep. 30, 2008 |
| 7427874 |
Interface block architectures |
Sep. 23, 2008 |
| 7425842 |
Logic basic cell |
Sep. 16, 2008 |
| 7425841 |
Configurable circuits, IC's, and systems |
Sep. 16, 2008 |
| 7423453 |
Efficient integrated circuit layout scheme to implement a scalable switching network used in interconnection fabric |
Sep. 9, 2008 |
| 7423452 |
Integrated circuit including a multiplexer circuit |
Sep. 9, 2008 |
| 7420392 |
Programmable gate array and embedded circuitry initialization and processing |
Sep. 2, 2008 |
| 7418692 |
Method for designing structured ASICS in silicon processes with three unique masking steps |
Aug. 26, 2008 |
| 7418603 |
Mobile terminal, circuit board, circuit board design aiding apparatus and method, design aiding program, and storage medium having stored therein design aiding program |
Aug. 26, 2008 |
| 7417457 |
Scalable non-blocking switching network for programmable logic |
Aug. 26, 2008 |
| 7417456 |
Dedicated logic cells employing sequential logic and control logic functions |
Aug. 26, 2008 |
| 7417454 |
Low-swing interconnections for field programmable gate arrays |
Aug. 26, 2008 |
| 7414433 |
Interconnect structure enabling indirect routing in programmable logic |
Aug. 19, 2008 |
| 7414432 |
Dedicated logic cells employing sequential logic and control logic functions |
Aug. 19, 2008 |
| 7414431 |
Dedicated logic cells employing configurable logic and dedicated logic functions |
Aug. 19, 2008 |
| 7414430 |
Programmable logic device having an embedded differential clock tree |
Aug. 19, 2008 |
| 7414429 |
Integration of high-speed serial interface circuitry into programmable logic device architectures |
Aug. 19, 2008 |
| 7414428 |
Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGA |
Aug. 19, 2008 |
| 7412635 |
Utilizing multiple bitstreams to avoid localized defects in partially defective programmable integrated circuits |
Aug. 12, 2008 |
| 7408383 |
FPGA architecture having two-level cluster input interconnect scheme without bandwidth limitation |
Aug. 5, 2008 |
| 7408382 |
Configurable circuits, IC's, and systems |
Aug. 5, 2008 |
| 7408381 |
Circuit for and method of implementing a plurality of circuits on a programmable logic device |
Aug. 5, 2008 |
| 7406573 |
Reconfigurable processor element utilizing both coarse and fine grained reconfigurable elements |
Jul. 29, 2008 |
| 7405588 |
Device and data processing method employing the device |
Jul. 29, 2008 |
| 7403035 |
Low-power transceiver architectures for programmable logic integrated circuit devices |
Jul. 22, 2008 |
| 7400167 |
Apparatus and methods for optimizing the performance of programmable logic devices |
Jul. 15, 2008 |
| 7397276 |
Logic block control architectures for programmable logic devices |
Jul. 8, 2008 |
| 7397275 |
Element controller for a resilient integrated circuit architecture |
Jul. 8, 2008 |
| 7394289 |
Synchronous first-in/first-out block memory for a field programmable gate array |
Jul. 1, 2008 |
| 7394288 |
Transferring data in a parallel processing environment |
Jul. 1, 2008 |
| 7394287 |
Programmable logic device having complex logic blocks with improved logic cell functionality |
Jul. 1, 2008 |
| 7392499 |
Placement of input/output blocks of an electronic design in an integrated circuit |
Jun. 24, 2008 |
| 7391236 |
Distributed memory in field-programmable gate array integrated circuit devices |
Jun. 24, 2008 |
| 7391235 |
Programmable crossbar signal processor with op-amp outputs |
Jun. 24, 2008 |
| 7391234 |
Circuit and circuit connecting method |
Jun. 24, 2008 |
| 7385421 |
Block symmetrization in a field programmable gate array |
Jun. 10, 2008 |
| 7385420 |
Repeatable block producing a non-uniform routing architecture in a field programmable gate array having segmented tracks |
Jun. 10, 2008 |
| 7385419 |
Dedicated input/output first in/first out module for a field programmable gate array |
Jun. 10, 2008 |
| 7385417 |
Dual slice architectures for programmable logic devices |
Jun. 10, 2008 |
| 7383092 |
Information processing apparatus and method, and program |
Jun. 3, 2008 |
| 7382157 |
Interconnect driver circuits for dynamic logic |
Jun. 3, 2008 |
| 7382156 |
Method and apparatus for universal program controlled bus architecture |
Jun. 3, 2008 |
| 7382154 |
Reconfigurable network on a chip |
Jun. 3, 2008 |
| 7380131 |
Copy protection without non-volatile memory |
May. 27, 2008 |
| 7378874 |
Creating high-drive logic devices from standard gates with minimal use of custom masks |
May. 27, 2008 |
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