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Class Information
Number: 326/38
Name: Electronic digital logic circuitry > Multifunctional or programmable (e.g., universal, etc.) > Having details of setting or programming of interconnections or logic functions
Description: Subject matter which includes specific procedures which establish the desired overall logic circuit operation.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7620929 |
Programmable logic device having a programmable selector circuit |
Nov. 17, 2009 |
| 7619442 |
Versatile bus interface macro for dynamically reconfigurable designs |
Nov. 17, 2009 |
| 7619441 |
Apparatus for interconnecting stacked dice on a programmable integrated circuit |
Nov. 17, 2009 |
| 7616026 |
System-on-a-chip integrated circuit including dual-function analog and digital inputs |
Nov. 10, 2009 |
| 7616025 |
Programmable logic device adapted to enter a low-power mode |
Nov. 10, 2009 |
| 7613943 |
Programmable system on a chip |
Nov. 3, 2009 |
| 7613942 |
Power mode transition in multi-threshold complementary metal oxide semiconductor (MTCMOS) circuits |
Nov. 3, 2009 |
| 7612582 |
Programmable logic controller and related electronic devices |
Nov. 3, 2009 |
| 7612581 |
Apparatus for dynamic deployment of pin functions on a chip |
Nov. 3, 2009 |
| 7609089 |
FPGA architecture at conventional and submicron scales |
Oct. 27, 2009 |
| 7609088 |
Programmable logic array |
Oct. 27, 2009 |
| 7609087 |
Integrated circuit device programming with partial power |
Oct. 27, 2009 |
| 7609086 |
Crossbar control circuit |
Oct. 27, 2009 |
| 7609085 |
Configurable integrated circuit with a 4-to-1 multiplexer |
Oct. 27, 2009 |
| 7605606 |
Area efficient routing architectures for programmable logic devices |
Oct. 20, 2009 |
| 7605604 |
Integrated circuits with novel handshake logic |
Oct. 20, 2009 |
| 7605603 |
User-accessible freeze-logic for dynamic power reduction and associated methods |
Oct. 20, 2009 |
| 7603599 |
Method to test routed networks |
Oct. 13, 2009 |
| 7603578 |
Programmable system on a chip for power-supply voltage and current monitoring and control |
Oct. 13, 2009 |
| 7602214 |
Reconfigurable sequencer structure |
Oct. 13, 2009 |
| 7602213 |
Using programmable latch to implement logic |
Oct. 13, 2009 |
| 7602207 |
Quantum-dot cellular automata methods and devices |
Oct. 13, 2009 |
| 7598768 |
Method and apparatus for dynamic port provisioning within a programmable logic device |
Oct. 6, 2009 |
| 7596774 |
Hard macro with configurable side input/output terminals, for a subsystem |
Sep. 29, 2009 |
| 7595659 |
Logic cell array and bus system |
Sep. 29, 2009 |
| 7592835 |
Co-processor having configurable logic blocks |
Sep. 22, 2009 |
| 7592834 |
Logic block control architectures for programmable logic devices |
Sep. 22, 2009 |
| 7592833 |
Systems and methods involving field programmable gate arrays |
Sep. 22, 2009 |
| 7592832 |
Adjustable transistor body bias circuitry |
Sep. 22, 2009 |
| 7589651 |
Flexible signal detect for programmable logic device serial interface |
Sep. 15, 2009 |
| 7589648 |
Data decompression |
Sep. 15, 2009 |
| 7589556 |
Dynamic control of memory interface timing |
Sep. 15, 2009 |
| 7589555 |
Variable sized soft memory macros in structured cell arrays, and related methods |
Sep. 15, 2009 |
| 7589552 |
Integrated circuit with redundancy |
Sep. 15, 2009 |
| 7586430 |
Integrated circuit comprising a mixed signal single-wire interface and method for operating the same |
Sep. 8, 2009 |
| 7586327 |
Distributed memory circuitry on structured application-specific integrated circuit devices |
Sep. 8, 2009 |
| 7586326 |
Integrated circuit apparatus |
Sep. 8, 2009 |
| 7583103 |
Configurable time borrowing flip-flops |
Sep. 1, 2009 |
| 7583102 |
Testing of input/output devices of an integrated circuit |
Sep. 1, 2009 |
| 7579869 |
Repeatable block producing a non-uniform routing architecture in a field programmable gate array having segmented tracks |
Aug. 25, 2009 |
| 7579866 |
Programmable logic device with configurable override of region-wide signals |
Aug. 25, 2009 |
| 7579865 |
Selective loading of configuration data into configuration memory cells |
Aug. 25, 2009 |
| 7579864 |
Logic block control system and logic block control method |
Aug. 25, 2009 |
| 7579863 |
Circuit and method for reducing pin count of chip |
Aug. 25, 2009 |
| 7576564 |
Configurable IC with routing circuits with offset connections |
Aug. 18, 2009 |
| 7576561 |
Device and method of configuring a device having programmable logic |
Aug. 18, 2009 |
| 7576558 |
Apparatus and method for enhanced readback of programmable logic device state information |
Aug. 18, 2009 |
| 7576557 |
Method and apparatus for mitigating one or more event upsets |
Aug. 18, 2009 |
| 7574549 |
Bridge design for SD and MMC multiplexing |
Aug. 11, 2009 |
| 7573295 |
Hard macro-to-user logic interface |
Aug. 11, 2009 |
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