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Class Information
Number: 326/126
Name: Electronic digital logic circuitry > Function of and, or, nand, nor, or not > Bipolar transistor (e.g., rtl, dctl, etc.) > Emitter-coupled or emitter-follower logic
Description: Subject matter wherein the logic function unit includes either: (a) an emitter-coupled arrangement which has the emitters of plural input transistors connected to the emitter and the base of a referenced transistor and commonly grounded (biased) through a current source for performing a nonsaturated, differential logic operation; or (b) an emitter-follower arrangement which has a plurality of transistors with the emitters commonly coupled as an output and which produces, as an output, a signal which is in phase with the input logic signals.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7474126 |
Parallel bipolar logic devices and methods for using such |
Jan. 6, 2009 |
| 7408384 |
Drive circuit of computer system for driving a mode indicator |
Aug. 5, 2008 |
| 7339402 |
Differential amplifier with over-voltage protection and method |
Mar. 4, 2008 |
| 7327165 |
Drive circuit of computer system for driving a mode indicator |
Feb. 5, 2008 |
| 7312639 |
Universal single-ended parallel bus |
Dec. 25, 2007 |
| 7301371 |
Transmitter of a semiconductor device |
Nov. 27, 2007 |
| 7288971 |
Systems and methods for actively-peaked current-mode logic |
Oct. 30, 2007 |
| 7250790 |
Circuit for providing a logic gate function and a latch function |
Jul. 31, 2007 |
| 7218145 |
Level conversion circuit |
May. 15, 2007 |
| 7202706 |
Systems and methods for actively-peaked current-mode logic |
Apr. 10, 2007 |
| 7202696 |
Circuit for temperature and beta compensation |
Apr. 10, 2007 |
| 7187212 |
System and method for providing a fast turn on bias circuit for current mode logic transmitters |
Mar. 6, 2007 |
| 7187207 |
Leakage balancing transistor for jitter reduction in CML to CMOS converters |
Mar. 6, 2007 |
| 7187208 |
Complimentary metal oxide silicon low voltage positive emitter coupled logic buffer |
Mar. 6, 2007 |
| 7154301 |
Apparatus and method for a low jitter predriver for differential output drivers |
Dec. 26, 2006 |
| 7148724 |
Signal output circuit |
Dec. 12, 2006 |
| 7145366 |
Electronic circuit with a differential pair of transistors and logic gate comprising such a circuit |
Dec. 5, 2006 |
| 7132848 |
Power management circuit |
Nov. 7, 2006 |
| 7106093 |
Semiconductor device |
Sep. 12, 2006 |
| 7098697 |
Low voltage high-speed differential logic devices and method of use thereof |
Aug. 29, 2006 |
| 7038495 |
Low jitter high speed CMOS to CML clock converter |
May. 2, 2006 |
| 7030660 |
Line driver |
Apr. 18, 2006 |
| 6937054 |
Programmable peaking receiver and method |
Aug. 30, 2005 |
| 6911847 |
Current switching type of high-speed logic circuit which generates output pair of differential signals each having accurately matched rise-time and fall-time waveform characteristics |
Jun. 28, 2005 |
| 6888378 |
Semiconductor integrated circuit |
May. 3, 2005 |
| 6885220 |
Current source circuit |
Apr. 26, 2005 |
| 6882178 |
Input circuit |
Apr. 19, 2005 |
| 6870389 |
Differential circuit with current overshoot suppression |
Mar. 22, 2005 |
| 6847233 |
Emitter coupled logic circuit with a data reload function |
Jan. 25, 2005 |
| 6842037 |
Shared transmission line communication system and method |
Jan. 11, 2005 |
| 6825707 |
Current mode logic (CML) circuit concept for a variable delay element |
Nov. 30, 2004 |
| 6798249 |
Circuit for asynchronous reset in current mode logic circuits |
Sep. 28, 2004 |
| 6794907 |
Low jitter high speed CMOS to CML clock converter |
Sep. 21, 2004 |
| 6753703 |
Resetable cascadable divide-by-two circuit |
Jun. 22, 2004 |
| 6750681 |
High speed current mode logic gate circuit architecture |
Jun. 15, 2004 |
| 6690207 |
Power efficient emitter-coupled logic circuit |
Feb. 10, 2004 |
| 6677784 |
Low voltage bipolar logic and gate device |
Jan. 13, 2004 |
| 6628220 |
Circuit for canceling thermal hysteresis in a current switch |
Sep. 30, 2003 |
| 6617926 |
Tail current node equalization for a variable offset amplifier |
Sep. 9, 2003 |
| 6552577 |
Differential emitter-coupled logic buffer having reduced power dissipation |
Apr. 22, 2003 |
| 6492842 |
Logic circuit |
Dec. 10, 2002 |
| 6429692 |
High speed data sampling with reduced metastability |
Aug. 6, 2002 |
| 6429691 |
Differential-input circuit |
Aug. 6, 2002 |
| 6411129 |
Logic circuit with output high voltage boost and method of using |
Jun. 25, 2002 |
| 6400184 |
Transistor output circuit |
Jun. 4, 2002 |
| 6366140 |
High bandwidth clock buffer |
Apr. 2, 2002 |
| 6359467 |
Dynamic element matching using current-mode butterfly randomization |
Mar. 19, 2002 |
| 6320422 |
Complementary source coupled logic |
Nov. 20, 2001 |
| 6300802 |
Output buffer with programmable voltage swing |
Oct. 9, 2001 |
| 6265901 |
Fully differential logic or circuit for multiple non-overlapping inputs |
Jul. 24, 2001 |
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