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Class Information
Number: 326/125
Name: Electronic digital logic circuitry > Function of and, or, nand, nor, or not > Bipolar transistor (e.g., rtl, dctl, etc.) > Wired logic or open collector logic (e.g., wired-or, wired-and, dotted logic, etc.)
Description: Subject matter which includes a logic family having their output gates eliminated simply by wiring the outputs of some basic logic circuits together, the resultant circuit is called wired-OR or wired-AND depending on the type of logic, and the joint output is in turn input to other logic gates for performing additional logic functions.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7330709 |
Receiver circuit using nanotube-based switches and logic |
Feb. 12, 2008 |
| 7216195 |
Architecture for managing disk drives |
May. 8, 2007 |
| 7106093 |
Semiconductor device |
Sep. 12, 2006 |
| 6674308 |
Low power wired OR |
Jan. 6, 2004 |
| 6411128 |
Logical circuit for serializing and outputting a plurality of signal bits simultaneously read from a memory cell array or the like |
Jun. 25, 2002 |
| 5959482 |
Controlled slew rate bus driver circuit having a high impedance state |
Sep. 28, 1999 |
| 5828237 |
Emitter coupled logic (ECL) gate and method of forming same |
Oct. 27, 1998 |
| 5754823 |
Configurable I/O system using logic state arrays |
May. 19, 1998 |
| 5508634 |
Semiconductor integrated circuit device of dual configuration having enhanced soft error withstanding capacity |
Apr. 16, 1996 |
| 5459411 |
Wired-OR logic circuits each having a constant current source |
Oct. 17, 1995 |
| 5436572 |
Semiconductor integrated circuuit device of dual configuration having enhanced soft error withstanding capacity |
Jul. 25, 1995 |
| 5428305 |
Differential logic level translator circuit with dual output logic levels selectable by power connector options |
Jun. 27, 1995 |
| 5233239 |
ECL circuit with feedback circuitry for increased speed |
Aug. 3, 1993 |
| 5206547 |
High-speed programmable state counter |
Apr. 27, 1993 |
| 5200651 |
Collector dot and circuit |
Apr. 6, 1993 |
| 5182473 |
Emitter emitter logic (EEL) and emitter collector dotted logic (ECDL) families |
Jan. 26, 1993 |
| 5170079 |
Collector dot and circuit with latched comparator |
Dec. 8, 1992 |
| 5162677 |
ECL to CMOS level conversion circuit |
Nov. 10, 1992 |
| 5107145 |
High speed current mode logic circuit with constant logic level current |
Apr. 21, 1992 |
| 5075574 |
Differential cascode current switch (DCCS) logic circuit family with input diodes |
Dec. 24, 1991 |
| 4987318 |
High level clamp driver for wire-or buses |
Jan. 22, 1991 |
| 4948991 |
Load controlled ECL transient driver |
Aug. 14, 1990 |
| 4942316 |
Cascode logic circuit including a positive level shift at the input of the top logic stage |
Jul. 17, 1990 |
| 4808855 |
Distributed precharge wire-or bus |
Feb. 28, 1989 |
| 4789797 |
Temperature-compensated interface circuit between "OR-tied" connection of a PLA device and a TTL output buffer |
Dec. 6, 1988 |
| 4760289 |
Two-level differential cascode current switch masterslice |
Jul. 26, 1988 |
| 4721867 |
High speed logic gate with simulated open collector output |
Jan. 26, 1988 |
| 4719371 |
Differential type gate circuit having control signal input |
Jan. 12, 1988 |
| 4704549 |
CMOS to ECL converter-buffer |
Nov. 3, 1987 |
| 4697109 |
Level converter circuit |
Sep. 29, 1987 |
| 4691161 |
Configurable logic gate array |
Sep. 1, 1987 |
| 4682058 |
Three-state logic circuit for wire-ORing to a data bus |
Jul. 21, 1987 |
| 4680486 |
Combinational logic circuits implemented with inverter function logic |
Jul. 14, 1987 |
| 4675553 |
Sequential logic circuits implemented with inverter function logic |
Jun. 23, 1987 |
| 4675552 |
Single input/multiple output logic interface circuit having minimized voltage swing |
Jun. 23, 1987 |
| 4672579 |
MTL storage cell with inherent output multiplex capability |
Jun. 9, 1987 |
| 4641047 |
Complex direct coupled transistor logic |
Feb. 3, 1987 |
| 4639620 |
Parallel-series converter |
Jan. 27, 1987 |
| 4626711 |
Exclusive or gate circuit |
Dec. 2, 1986 |
| 4625310 |
Universally testable logic elements and method for structural testing of logic circuits formed of such logic elements |
Nov. 25, 1986 |
| 4617475 |
Wired logic voting circuit |
Oct. 14, 1986 |
| 4608504 |
Interface circuit for interconnecting peripherals to an information processing device |
Aug. 26, 1986 |
| 4608667 |
Dual mode logic circuit for a memory array |
Aug. 26, 1986 |
| 4605871 |
Inverter function logic gate |
Aug. 12, 1986 |
| 4484091 |
Exclusive-OR circuit |
Nov. 20, 1984 |
| 4427904 |
Digital signal generating circuit |
Jan. 24, 1984 |
| 4368395 |
Differential linear to digital translator |
Jan. 11, 1983 |
| 4346312 |
Integrated semiconductor current driver circuitry |
Aug. 24, 1982 |
| 4319148 |
High speed 3-way exclusive OR logic circuit |
Mar. 9, 1982 |
| 4311925 |
Current switch emitter follower latch having output signals with reduced noise |
Jan. 19, 1982 |
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