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Class Information
Number: 326/121
Name: Electronic digital logic circuitry > Function of and, or, nand, nor, or not > Field-effect transistor (e.g., jfet, etc.) > Mosfet (i.e., metal-oxide semiconductor field-effect transistor) > Cmos
Description: Subject matter wherein the logic function unit includes two enhancement mode metal-oxide semiconductor field-effect transistor elements connected in series with gates tied together, each having a channel of conductivity type opposite that of the other (i.e., P-MOS vs. N-MOS).
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6946877 |
Circuit and associated methodology |
Sep. 20, 2005 |
| 6946879 |
Logic array and dynamic logic method |
Sep. 20, 2005 |
| 6943589 |
Combination multiplexer and tristate driver circuit |
Sep. 13, 2005 |
| 6940314 |
Dynamic node keeper system and method |
Sep. 6, 2005 |
| 6937068 |
Semiconductor integrated circuit |
Aug. 30, 2005 |
| 6937053 |
Single event hardening of null convention logic circuits |
Aug. 30, 2005 |
| 6937538 |
Asynchronously resettable decoder for a semiconductor memory |
Aug. 30, 2005 |
| 6924670 |
Complementary input dynamic muxed-decoder |
Aug. 2, 2005 |
| 6921950 |
Semiconductor device |
Jul. 26, 2005 |
| 6919739 |
Feedforward limited switch dynamic logic circuit |
Jul. 19, 2005 |
| 6900658 |
Null convention threshold gate |
May. 31, 2005 |
| 6900666 |
Dual threshold voltage and low swing domino logic circuits |
May. 31, 2005 |
| 6898745 |
Integrated device with operativity testing |
May. 24, 2005 |
| 6888377 |
Duo-mode keeper circuit |
May. 3, 2005 |
| 6867620 |
Circuits and methods for high-capacity asynchronous pipeline |
Mar. 15, 2005 |
| 6859072 |
Method for clock control of clocked half-rail differential logic with sense amplifier and single-rail logic |
Feb. 22, 2005 |
| 6850094 |
Semiconductor integrated circuit having a plurality of threshold voltages |
Feb. 1, 2005 |
| 6838906 |
I/O buffer with variable conductivity |
Jan. 4, 2005 |
| 6838909 |
Bulk input differential logic circuit |
Jan. 4, 2005 |
| 6831484 |
Semiconductor integrated circuit having logic circuit comprising transistors with lower threshold voltage values and improved pattern layout |
Dec. 14, 2004 |
| 6831483 |
Semiconductor integrated circuit having high-speed and low-power logic gates with common transistor substrate potentials, and design data recording medium therefor |
Dec. 14, 2004 |
| 6825694 |
Flip-flop circuit for use in electronic devices |
Nov. 30, 2004 |
| 6822479 |
I/O buffer power up sequence |
Nov. 23, 2004 |
| 6808998 |
Method for elimination of parasitic bipolar action in silicon on insulator (SOI) dynamic logic circuits |
Oct. 26, 2004 |
| 6806737 |
Bi-directional amplifier and method for accelerated bus line communication |
Oct. 19, 2004 |
| 6801057 |
Silicon-on-insulator dynamic logic |
Oct. 5, 2004 |
| 6798244 |
Output buffer with overvoltage protection |
Sep. 28, 2004 |
| 6794903 |
CMOS parallel dynamic logic and speed enhanced static logic |
Sep. 21, 2004 |
| 6791365 |
Dynamic logic circuits using transistors having differing threshold voltages and delayed low threshold voltage leakage protection |
Sep. 14, 2004 |
| 6788103 |
Activ shunt-peaked logic gates |
Sep. 7, 2004 |
| 6781415 |
Active voltage level bus switch (or pass gate) translator |
Aug. 24, 2004 |
| 6768340 |
Fault-tolerant inverter circuit |
Jul. 27, 2004 |
| 6768344 |
Clocked half-rail differential logic with single-rail logic and sense amplifier |
Jul. 27, 2004 |
| 6768343 |
Clocked half-rail differential logic with sense amplifier and shut-off |
Jul. 27, 2004 |
| 6768342 |
Surfing logic pipelines |
Jul. 27, 2004 |
| 6765415 |
Clocked full-rail differential logic with shut-off |
Jul. 20, 2004 |
| 6759877 |
Dynamic circuitry with on-chip temperature-controlled keeper device |
Jul. 6, 2004 |
| 6759876 |
Semiconductor integrated circuit |
Jul. 6, 2004 |
| 6759873 |
Reverse biasing logic circuit |
Jul. 6, 2004 |
| 6756813 |
Voltage translator |
Jun. 29, 2004 |
| 6756814 |
Logic circuit and semiconductor device |
Jun. 29, 2004 |
| 6750680 |
Semiconductor integrated circuit, logic operation circuit, and flip flop |
Jun. 15, 2004 |
| 6750679 |
Clocked full-rail differential logic with sense amplifier and single-rail logic |
Jun. 15, 2004 |
| 6744297 |
Inverter circuit |
Jun. 1, 2004 |
| 6744282 |
Latching dynamic logic structure, and integrated circuit including same |
Jun. 1, 2004 |
| 6741101 |
Method for clock control of clocked half-rail differential logic with single-rail logic |
May. 25, 2004 |
| 6737888 |
Method for skipping a latch in timing-sensitive dynamic circuits of a multi-clocked system with unspecific underlap requirement |
May. 18, 2004 |
| 6731134 |
Tri-state delay boost |
May. 4, 2004 |
| 6724225 |
Logic circuit for true and complement signal generator |
Apr. 20, 2004 |
| 6718529 |
Method for calculation of cell delay time |
Apr. 6, 2004 |
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