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Class Information
Number: 326/121
Name: Electronic digital logic circuitry > Function of and, or, nand, nor, or not > Field-effect transistor (e.g., jfet, etc.) > Mosfet (i.e., metal-oxide semiconductor field-effect transistor) > Cmos
Description: Subject matter wherein the logic function unit includes two enhancement mode metal-oxide semiconductor field-effect transistor elements connected in series with gates tied together, each having a channel of conductivity type opposite that of the other (i.e., P-MOS vs. N-MOS).
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 4857770 |
Output buffer arrangement for reducing chip noise without speed penalty |
Aug. 15, 1989 |
| 4857763 |
MOS semiconductor integrated circuit in which the production of hot carriers near the drain of a short n channel conductivity type MOS transistor is decreased |
Aug. 15, 1989 |
| 4851713 |
Fast CMOS NAND gate circuit |
Jul. 25, 1989 |
| 4851714 |
Multiple output field effect transistor logic |
Jul. 25, 1989 |
| 4825106 |
MOS no-leak circuit |
Apr. 25, 1989 |
| 4823309 |
Data processing system with improved output function |
Apr. 18, 1989 |
| 4810906 |
Vertical inverter circuit |
Mar. 7, 1989 |
| 4797580 |
Current-mirror-biased pre-charged logic circuit |
Jan. 10, 1989 |
| 4789796 |
Output buffer having sequentially-switched output |
Dec. 6, 1988 |
| 4785203 |
Buffer circuit having decreased current consumption |
Nov. 15, 1988 |
| 4780626 |
Domino-type MOS logic gate having an MOS sub-network |
Oct. 25, 1988 |
| 4775809 |
Output buffer circuit avoiding electrostatic breakdown |
Oct. 4, 1988 |
| 4758744 |
Decoder circuitry with reduced number of inverters and bus lines |
Jul. 19, 1988 |
| 4751407 |
Self-timing circuit |
Jun. 14, 1988 |
| 4749882 |
Apparatus and method for applying rapid transient signals to components on a printed circuit board |
Jun. 7, 1988 |
| 4745306 |
Half adder having a pair of precharged stages |
May. 17, 1988 |
| 4742254 |
CMOS integrated circuit for signal delay |
May. 3, 1988 |
| 4742247 |
CMOS address transition detector with temperature compensation |
May. 3, 1988 |
| 4736123 |
MOS logic input circuit having compensation for fluctuations in the supply voltage |
Apr. 5, 1988 |
| 4719369 |
Output circuit having transistor monitor for matching output impedance to load impedance |
Jan. 12, 1988 |
| 4716308 |
MOS pull-up or pull-down logic circuit having equalized discharge time delays and layout avoiding crossovers |
Dec. 29, 1987 |
| 4712021 |
Cmos inverter |
Dec. 8, 1987 |
| 4710648 |
Semiconductor including signal processor and transient detector for low temperature operation |
Dec. 1, 1987 |
| 4710649 |
Transmission-gate structured logic circuits |
Dec. 1, 1987 |
| 4709172 |
Input-voltage detector circuit for CMOS integrated circuit |
Nov. 24, 1987 |
| 4707626 |
Internal time-out circuit for CMOS dynamic RAM |
Nov. 17, 1987 |
| 4704547 |
IGFET gating circuit having reduced electric field degradation |
Nov. 3, 1987 |
| 4700089 |
Delay circuit for gate-array LSI |
Oct. 13, 1987 |
| 4692637 |
CMOS logic circuit with single clock pulse |
Sep. 8, 1987 |
| 4682055 |
CFET inverter having equal output signal rise and fall times by adjustment of the pull-up and pull-down transconductances |
Jul. 21, 1987 |
| 4678943 |
Inverting logic buffer BICMOS switching circuit using an enabling switch for three-state operation with reduced dissipation |
Jul. 7, 1987 |
| 4675544 |
CMOS-inverter |
Jun. 23, 1987 |
| 4654548 |
Complementary logic circuit |
Mar. 31, 1987 |
| 4649296 |
Synthetic CMOS static logic gates |
Mar. 10, 1987 |
| 4647798 |
Negative input voltage CMOS circuit |
Mar. 3, 1987 |
| 4645952 |
High speed NOR gate |
Feb. 24, 1987 |
| 4645944 |
MOS register for selecting among various data inputs |
Feb. 24, 1987 |
| 4634901 |
Sense amplifier for CMOS semiconductor memory devices having symmetrically balanced layout |
Jan. 6, 1987 |
| 4624006 |
Bidirectional shift register using parallel inverters with adjustable transconductance |
Nov. 18, 1986 |
| 4621207 |
Logic circuit with MOSFETs arranged to reduce current flow |
Nov. 4, 1986 |
| 4620117 |
Balanced CMOS logic circuits |
Oct. 28, 1986 |
| 4613772 |
Current compensation for logic gates |
Sep. 23, 1986 |
| 4613773 |
Racefree CMOS clocked logic circuit |
Sep. 23, 1986 |
| 4609836 |
CMOS transmission circuit |
Sep. 2, 1986 |
| 4595845 |
Non-overlapping clock CMOS circuit with two threshold voltages |
Jun. 17, 1986 |
| 4594519 |
Low power consumption, high speed CMOS signal input circuit |
Jun. 10, 1986 |
| 4588903 |
Amorphous semiconductor devices having increased switching speed due to dynamic signal conditioning |
May. 13, 1986 |
| 4577124 |
CMOS Logic circuit |
Mar. 18, 1986 |
| 4563599 |
Circuit for address transition detection |
Jan. 7, 1986 |
| 4558236 |
Universal logic circuit |
Dec. 10, 1985 |
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