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Class Information
Number: 326/121
Name: Electronic digital logic circuitry > Function of and, or, nand, nor, or not > Field-effect transistor (e.g., jfet, etc.) > Mosfet (i.e., metal-oxide semiconductor field-effect transistor) > Cmos
Description: Subject matter wherein the logic function unit includes two enhancement mode metal-oxide semiconductor field-effect transistor elements connected in series with gates tied together, each having a channel of conductivity type opposite that of the other (i.e., P-MOS vs. N-MOS).










Patents under this class:
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Patent Number Title Of Patent Date Issued
8680889 Light emitting diode and integrated package therefor Mar. 25, 2014
8664977 Ultra-low power multi-threshold asynchronous circuit design Mar. 4, 2014
8653857 Circuitry and layouts for XOR and XNOR logic Feb. 18, 2014
8653856 Electronic device and method for buffering Feb. 18, 2014
8629693 Semiconductor integrated circuit with a chain of inverters Jan. 14, 2014
8593179 Delay circuit and inverter for semiconductor integrated device Nov. 26, 2013
8575963 Buffer system having reduced threshold current Nov. 5, 2013
8493774 Performing logic functions on more than one memory cell within an array of memory cells Jul. 23, 2013
8487656 Dynamic logic circuit Jul. 16, 2013
8487657 Dynamic logic circuit Jul. 16, 2013
8482316 Adaptive timing control circuitry to address leakage Jul. 9, 2013
8461877 CMOS circuit with dynamic parasitic net pulldown circuit Jun. 11, 2013
8421503 Latch circuit Apr. 16, 2013
8405421 Nonvolatile full adder circuit Mar. 26, 2013
8384439 Semiconductor devices and methods of fabricating the same Feb. 26, 2013
8373438 Nonvolatile logic circuit Feb. 12, 2013
8373443 Logic circuit Feb. 12, 2013
8351028 Measuring device for measuring a focused laser beam Jan. 8, 2013
8324940 Nanowire circuits in matched devices Dec. 4, 2012
8294492 Ultra-low-power circuit Oct. 23, 2012
8220947 Differential driver circuit Jul. 17, 2012
8217680 Method of operating inverter Jul. 10, 2012
8207758 Ultra-low power multi-threshold asynchronous circuit design Jun. 26, 2012
8188767 Logic circuit and method of logic circuit design May. 29, 2012
8120384 Multivalued logic circuit Feb. 21, 2012
8111089 Building block for a secure CMOS logic cell library Feb. 7, 2012
8059452 Cell structure for dual port SRAM Nov. 15, 2011
8036846 Variable impedance sense architecture and method Oct. 11, 2011
8030971 High-density logic techniques with reduced-stack multi-gate field effect transistors Oct. 4, 2011
8004316 Logic circuit and method of logic circuit design Aug. 23, 2011
7994824 Logic gate with a reduced number of switches, especially for applications in integrated circuits Aug. 9, 2011
7986167 Circuit configurations having four terminal devices Jul. 26, 2011
7952392 Logic circuit May. 31, 2011
7948263 Power gating circuit and integrated circuit including same May. 24, 2011
7919990 Semiconductor device Apr. 5, 2011
7893719 Apparatus and methods for self-biasing differential signaling circuitry having multimode output configurations for low voltage applications Feb. 22, 2011
7876131 Dual gate transistor keeper dynamic logic Jan. 25, 2011
7872503 Combinatorial logic circuit Jan. 18, 2011
7867858 Hybrid transistor based power gating switch circuit and method Jan. 11, 2011
7859308 Reconfigurable logic cell made up of double-gate MOSFET transistors Dec. 28, 2010
7859312 Multivalued logic circuit Dec. 28, 2010
7830179 Multi-functional logic gate device and programmable integrated circuit device using the same Nov. 9, 2010
7804331 Semiconductor device Sep. 28, 2010
7804332 Circuit configurations having four terminal JFET devices Sep. 28, 2010
7768315 Multiplexor with leakage power regulator Aug. 3, 2010
7764087 Low swing domino logic circuits Jul. 27, 2010
7724037 Apparatus and methods for self-biasing differential signaling circuitry having multimode output configurations for low voltage applications May. 25, 2010
7710160 Stacked inverter delay chain May. 4, 2010
7705635 Circuit for converting a voltage range of a logic signal Apr. 27, 2010
7672965 Finite-state machine augmented for multiple evaluations of text Mar. 2, 2010

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