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Class Information
Number: 326/119
Name: Electronic digital logic circuitry > Function of and, or, nand, nor, or not > Field-effect transistor (e.g., jfet, etc.) > Mosfet (i.e., metal-oxide semiconductor field-effect transistor)
Description: Subject matter includes a field-effect transistor having a metallic gate insulated from the channel by an oxide layer (e.g., SiO2
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7619440 |
Circuit having logic state retention during power-down and method therefor |
Nov. 17, 2009 |
| 7602211 |
Semiconductor integrated circuit device |
Oct. 13, 2009 |
| 7592842 |
Configurable delay chain with stacked inverter delay elements |
Sep. 22, 2009 |
| 7570081 |
Multiple-output static logic |
Aug. 4, 2009 |
| 7560955 |
Logic circuit |
Jul. 14, 2009 |
| 7535260 |
Logic gates, scan drivers and organic light emitting displays using the same |
May. 19, 2009 |
| 7528631 |
Logic gate, scan driver and organic light emitting diode display using the same |
May. 5, 2009 |
| 7509613 |
Design method and architecture for power gate switch placement and interconnection using tapless libraries |
Mar. 24, 2009 |
| 7498846 |
Power efficient multiplexer |
Mar. 3, 2009 |
| 7498833 |
Semiconductor integrated circuit |
Mar. 3, 2009 |
| 7486106 |
CPLD for multi-wire keyboard decode with timed power control circuit |
Feb. 3, 2009 |
| 7479801 |
Power gating techniques able to have data retention and variability immunity properties |
Jan. 20, 2009 |
| 7459937 |
Low voltage CMOS driver for inductive loads |
Dec. 2, 2008 |
| 7436212 |
Interface circuit power reduction |
Oct. 14, 2008 |
| 7420388 |
Power gating techniques able to have data retention and variability immunity properties |
Sep. 2, 2008 |
| 7417469 |
Compensation for leakage current from dynamic storage node variation by the utilization of an automatic self-adaptive keeper |
Aug. 26, 2008 |
| 7397271 |
Semiconductor integrated circuit device |
Jul. 8, 2008 |
| 7394294 |
Complementary pass-transistor logic circuit and semiconductor device |
Jul. 1, 2008 |
| 7382162 |
High-density logic techniques with reduced-stack multi-gate field effect transistors |
Jun. 3, 2008 |
| 7378876 |
Complementary output inverter |
May. 27, 2008 |
| 7375547 |
Semiconductor integrated circuit and semiconductor integrated circuit manufacturing method |
May. 20, 2008 |
| 7365576 |
Binary digital latches not using only NAND or NOR circuits |
Apr. 29, 2008 |
| 7336104 |
Multiple-output transistor logic circuit |
Feb. 26, 2008 |
| 7336102 |
Error correcting logic system |
Feb. 26, 2008 |
| 7310008 |
Configurable delay chain with stacked inverter delay elements |
Dec. 18, 2007 |
| 7307457 |
Apparatus for implementing dynamic data path with interlocked keeper and restore devices |
Dec. 11, 2007 |
| 7304508 |
Method and apparatus for fast flip-flop |
Dec. 4, 2007 |
| 7298176 |
Dual-gate dynamic logic circuit with pre-charge keeper |
Nov. 20, 2007 |
| 7292061 |
Semiconductor integrated circuit having current leakage reduction scheme |
Nov. 6, 2007 |
| 7292064 |
Minimizing timing skew among chip level outputs for registered output signals |
Nov. 6, 2007 |
| 7288968 |
Circuit element |
Oct. 30, 2007 |
| 7282960 |
Dynamic logical circuit having a pre-charge element separately controlled by a voltage-asymmetric clock |
Oct. 16, 2007 |
| 7279927 |
Integrated circuit with multiple power domains |
Oct. 9, 2007 |
| 7271615 |
Integrated circuits with reduced leakage current |
Sep. 18, 2007 |
| 7262631 |
Method and apparatus for controlling a voltage level |
Aug. 28, 2007 |
| 7256620 |
Selector circuit and semiconductor device |
Aug. 14, 2007 |
| 7230455 |
Logic circuits utilizing gated diode sensing |
Jun. 12, 2007 |
| 7205796 |
AND circuit |
Apr. 17, 2007 |
| 7202704 |
Leakage sensing and keeper circuit for proper operation of a dynamic circuit |
Apr. 10, 2007 |
| 7183808 |
Circuit for power management of standard cell application |
Feb. 27, 2007 |
| 7157941 |
Differential switching circuit and digital-to-analog converter |
Jan. 2, 2007 |
| 7138835 |
Method and apparatus for an equalizing buffer |
Nov. 21, 2006 |
| 7138834 |
Symmetric differential logic circuits |
Nov. 21, 2006 |
| 7126370 |
Power gating techniques able to have data retention and variability immunity properties |
Oct. 24, 2006 |
| 7109757 |
Leakage-tolerant dynamic wide-NOR circuit structure |
Sep. 19, 2006 |
| 7106093 |
Semiconductor device |
Sep. 12, 2006 |
| 7095252 |
Charge sharing reduction by applying intrinsic parallelism in complex dynamic domino type CMOS gates |
Aug. 22, 2006 |
| 7088144 |
Conditional precharge design in staticized dynamic flip-flop with clock enable |
Aug. 8, 2006 |
| 7088143 |
Dynamic circuits having improved noise tolerance and method for designing same |
Aug. 8, 2006 |
| 7078235 |
Sulfur trioxide conditioning system control algorithm |
Jul. 18, 2006 |
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