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Class Information
Number: 326/102
Name: Electronic digital logic circuitry > Significant integrated structure, layout, or layout interconnections > Field-effect transistor
Description: Subject matter wherein the logic means includes a unipolar transistor in which current carriers are injected at a source terminal and pass to a drain terminal through a channel of semiconductor material whose conductivity depends largely on an electrical field applied to the semiconductor from a control electrode (gate).
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7610572 |
Semiconductor integrated circuit device with independent power domains |
Oct. 27, 2009 |
| 7474125 |
Method of producing and operating a low power junction field effect transistor |
Jan. 6, 2009 |
| 7342422 |
Semiconductor device having super junction structure and method for manufacturing the same |
Mar. 11, 2008 |
| 7193442 |
USB 1.1 for USB OTG implementation |
Mar. 20, 2007 |
| 7164294 |
Method for forming programmable logic arrays using vertical gate transistors |
Jan. 16, 2007 |
| 7078936 |
Coupling of signals between adjacent functional blocks in an integrated circuit chip |
Jul. 18, 2006 |
| 7028282 |
Integrated circuit with layout matched high speed lines |
Apr. 11, 2006 |
| 6958519 |
Methods of forming field effect transistors and field effect transistor circuitry |
Oct. 25, 2005 |
| 6949957 |
Command user interface with programmable decoder |
Sep. 27, 2005 |
| 6894532 |
Programmable logic arrays with ultra thin body transistors |
May. 17, 2005 |
| 6876226 |
Integrated digital circuit |
Apr. 5, 2005 |
| 6812742 |
Electronic device |
Nov. 2, 2004 |
| 6810512 |
Integrated circuit with layout matched high speed lines |
Oct. 26, 2004 |
| 6804305 |
Wide common mode range differential receiver |
Oct. 12, 2004 |
| 6794904 |
Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation |
Sep. 21, 2004 |
| 6774671 |
Multi-purpose transistor array |
Aug. 10, 2004 |
| 6690206 |
Semiconductor integrated circuit device |
Feb. 10, 2004 |
| 6683476 |
Contact ring architecture |
Jan. 27, 2004 |
| 6636075 |
Semiconductor integrated circuit and its fabrication method |
Oct. 21, 2003 |
| 6600341 |
Integrated circuit and associated design method using spare gate islands |
Jul. 29, 2003 |
| 6597200 |
Circuit arrangement for scalable output drivers |
Jul. 22, 2003 |
| 6571380 |
Integrated circuit with layout matched high speed lines |
May. 27, 2003 |
| 6530068 |
Device modeling and characterization structure with multiplexed pads |
Mar. 4, 2003 |
| 6529035 |
Arrangement for improving the ESD protection in a CMOS buffer |
Mar. 4, 2003 |
| 6515511 |
Semiconductor integrated circuit and semiconductor integrated circuit device |
Feb. 4, 2003 |
| 6515510 |
Programmable logic array with vertical transistors |
Feb. 4, 2003 |
| 6496040 |
Trading off gate delay versus leakage current using device stack effect |
Dec. 17, 2002 |
| 6496034 |
Programmable logic arrays with ultra thin body transistors |
Dec. 17, 2002 |
| 6480032 |
Gate array architecture |
Nov. 12, 2002 |
| 6437389 |
Vertical gate transistors in pass transistor programmable logic arrays |
Aug. 20, 2002 |
| 6400182 |
Semiconductor integrated circuit device and method of laying out clock driver used in the semiconductor integrated circuit device |
Jun. 4, 2002 |
| 6377070 |
In-service programmable logic arrays with ultra thin vertical body transistors |
Apr. 23, 2002 |
| 6373286 |
Integrated circuit with improved off chip drivers |
Apr. 16, 2002 |
| 6356118 |
Semiconductor integrated circuit device |
Mar. 12, 2002 |
| 6331800 |
Post-silicon methods for adjusting the rise/fall times of clock edges |
Dec. 18, 2001 |
| 6329845 |
Logic gate cell |
Dec. 11, 2001 |
| 6323689 |
Semiconductor integrated circuit including output buffer circuit having high resistance to electro-static discharge |
Nov. 27, 2001 |
| 6307238 |
Methods of forming field effect transistors and field effect transistor circuitry |
Oct. 23, 2001 |
| 6297668 |
Serial device compaction for improving integrated circuit layouts |
Oct. 2, 2001 |
| 6236232 |
Multi-purpose transistor array |
May. 22, 2001 |
| 6229342 |
Circuits and method for body contacted and backgated transistors |
May. 8, 2001 |
| 6208164 |
Programmable logic array with vertical transistors |
Mar. 27, 2001 |
| 6191606 |
Method and apparatus for reducing standby leakage current using input vector activation |
Feb. 20, 2001 |
| 6107836 |
Semiconductor integrated circuit device having power reduction mechanism |
Aug. 22, 2000 |
| 6060911 |
Circuit arrangement with at least four transistors, and method for the manufacture thereof |
May. 9, 2000 |
| 5977794 |
Logic array having interleaved logic planes |
Nov. 2, 1999 |
| 5877564 |
Mobile station voltage supply using level shift of base band operating voltages |
Mar. 2, 1999 |
| 5852366 |
High voltage level shift circuit including CMOS transistor having thin gate insulating film |
Dec. 22, 1998 |
| 5777941 |
Column multiplexer |
Jul. 7, 1998 |
| 5396130 |
Method and apparatus for adaptive chip trim adjustment |
Mar. 7, 1995 |
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