| |
 |
|
Class Information
Number: 326/101
Name: Electronic digital logic circuitry > Significant integrated structure, layout, or layout interconnections
Description: Subject matter including an arrangement of components fabricated in a semiconductor material or integrated circuit chip with significant design emphasis on the topological arrangement of the components and their circuit connectors.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5717346 |
Low skew multiplexer network and programmable array clock/reset application thereof |
Feb. 10, 1998 |
| 5712579 |
Deskewed clock distribution network with edge clock |
Jan. 27, 1998 |
| 5708372 |
Semiconductor device with electromagnetic radiation reduced |
Jan. 13, 1998 |
| 5686845 |
Hierarchial clock distribution system and method |
Nov. 11, 1997 |
| 5668484 |
High frequency clock signal distribution circuit with reduced clock skew |
Sep. 16, 1997 |
| 5663677 |
Integrated circuit multi-level interconnection technique |
Sep. 2, 1997 |
| 5642058 |
Periphery input/output interconnect structure |
Jun. 24, 1997 |
| 5635853 |
Inherently balanced voltage regulation and current supply for bus termination |
Jun. 3, 1997 |
| 5631581 |
Microelectronic integrated circuit including triangular semiconductor "and" gate device |
May. 20, 1997 |
| 5627482 |
Electronic digital clock distribution system |
May. 6, 1997 |
| 5619643 |
Circuit for detecting a fault state in a clock signal for microprocessor electronic devices |
Apr. 8, 1997 |
| 5612892 |
Method and structure for improving power consumption on a component while maintaining high operating frequency |
Mar. 18, 1997 |
| 5585745 |
Method and apparatus for reducing power consumption in digital electronic circuits |
Dec. 17, 1996 |
| 5583449 |
Cancellation of line reflections in a clock distribution network |
Dec. 10, 1996 |
| 5581202 |
Semiconductor integrated circuit device and production method thereof |
Dec. 3, 1996 |
| 5578945 |
Methods and apparatus for providing a negative delay on an IC chip |
Nov. 26, 1996 |
| 5576642 |
Electronic system including high performance backplane driver/receiver circuits |
Nov. 19, 1996 |
| 5570045 |
Hierarchical clock distribution system and method |
Oct. 29, 1996 |
| 5570046 |
Lead frame with noisy and quiet V.sub.SS and V.sub.DD leads |
Oct. 29, 1996 |
| 5557235 |
Semiconductor device comprising a grounding pad near a reference signal pad and a capacitor between the pads |
Sep. 17, 1996 |
| 5543736 |
Gate array architecture and layout for deep space applications |
Aug. 6, 1996 |
| 5537061 |
Semiconductor integrated circuit having signal paths with equal propagation delays |
Jul. 16, 1996 |
| 5530381 |
Integrated high-speed bipolar logic circuit method |
Jun. 25, 1996 |
| 5521536 |
Integrated circuit device having different signal transfer circuits for wirings with different lengths |
May. 28, 1996 |
| 5517132 |
Logic synthesis method and semiconductor integrated circuit |
May. 14, 1996 |
| 5497109 |
Integrated circuit with reduced clock skew |
Mar. 5, 1996 |
| 5481210 |
Method for controlling clock frequency of a digital logic semiconductor according to temperature |
Jan. 2, 1996 |
| 5481209 |
Clock distribution and control in an integrated circuit |
Jan. 2, 1996 |
| 5471157 |
Integrated circuit with centralized control of edge transition detection pulse generation |
Nov. 28, 1995 |
| 5469078 |
Programmable logic device routing architecture |
Nov. 21, 1995 |
| 5463560 |
Semiconductor integrated circuit device |
Oct. 31, 1995 |
| 5459342 |
Field programmable gate array with spare circuit block |
Oct. 17, 1995 |
| 5448208 |
Semiconductor integrated circuit having an equal propagation delay |
Sep. 5, 1995 |
| 5436573 |
High-speed semiconductor integrated circuit device with reduced delay in gate-to-gate wiring |
Jul. 25, 1995 |
| 5430397 |
Intra-LSI clock distribution circuit |
Jul. 4, 1995 |
| 5406118 |
Semiconductor integrated circuit having a long bus line |
Apr. 11, 1995 |
| 5402016 |
Integrated high-speed bipolar logic circuit |
Mar. 28, 1995 |
| 5396129 |
Semiconductor integrated circuit apparatus comprising clock signal line formed in a ring shape |
Mar. 7, 1995 |
| 5394490 |
Semiconductor device having an optical waveguide interposed in the space between electrode members |
Feb. 28, 1995 |
| 5391900 |
Integrated circuit having power trunk line and method for layout of power trunk line |
Feb. 21, 1995 |
| 5378904 |
Semiconductor integrated circuit and method and system for designing layout of the same |
Jan. 3, 1995 |
| 5376842 |
Integrated circuit with reduced clock skew and divided power supply lines |
Dec. 27, 1994 |
| 5347182 |
Device for indicating that an optional component is mounted on a board |
Sep. 13, 1994 |
| 5341049 |
Integrated circuit having alternate rows of logic cells and I/O cells |
Aug. 23, 1994 |
| 5331681 |
Function adjustable signal processing device |
Jul. 19, 1994 |
| 5315182 |
Semiconductor integrated circuit having annular power supply with plural lines |
May. 24, 1994 |
| 5306967 |
Apparatus for improving signal transmission along parallel lines |
Apr. 26, 1994 |
| 5296748 |
Clock distribution system |
Mar. 22, 1994 |
| 5270592 |
Clock supply circuit layout in a circuit area |
Dec. 14, 1993 |
| 5270588 |
Data output buffer with selective bootstrap circuit |
Dec. 14, 1993 |
|
|
|
