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Class Information
Number: 326/101
Name: Electronic digital logic circuitry > Significant integrated structure, layout, or layout interconnections
Description: Subject matter including an arrangement of components fabricated in a semiconductor material or integrated circuit chip with significant design emphasis on the topological arrangement of the components and their circuit connectors.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6677781 |
Semiconductor integrated circuit device |
Jan. 13, 2004 |
| 6674307 |
General-purpose logic module and cell using the same |
Jan. 6, 2004 |
| 6667636 |
DSP integrated with programmable logic based accelerators |
Dec. 23, 2003 |
| 6661252 |
Matrix switch device high in isolation between terminals thereof, small in size, and low in manufacturing cost |
Dec. 9, 2003 |
| 6661253 |
Passgate structures for use in low-voltage applications |
Dec. 9, 2003 |
| 6653857 |
Increasing implicit decoupling capacitance using asymmetric shieldings |
Nov. 25, 2003 |
| 6653858 |
Bypass capacitance localization |
Nov. 25, 2003 |
| 6653859 |
Heterogeneous integrated circuit with reconfigurable logic cores |
Nov. 25, 2003 |
| 6650141 |
High speed interface for a programmable interconnect circuit |
Nov. 18, 2003 |
| 6646475 |
On-chip power supply with optimized electromagnetic compatibility |
Nov. 11, 2003 |
| 6636075 |
Semiconductor integrated circuit and its fabrication method |
Oct. 21, 2003 |
| 6633183 |
Antifuse reroute of dies |
Oct. 14, 2003 |
| 6628144 |
Circuit and method for contact pad isolation |
Sep. 30, 2003 |
| 6621294 |
Pad system for an integrated circuit or device |
Sep. 16, 2003 |
| 6614261 |
Interconnection and input/output resources for programable logic integrated circuit devices |
Sep. 2, 2003 |
| 6614267 |
Electronic circuit device and hybrid integrated circuit with an ASIC and an FPGA |
Sep. 2, 2003 |
| 6605961 |
Low voltage PLA's with ultrathin tunnel oxides |
Aug. 12, 2003 |
| 6603330 |
Configuring digital functions in a digital configurable macro architecture |
Aug. 5, 2003 |
| 6604230 |
Multi-logic device systems having partial crossbar and direct interconnection architectures |
Aug. 5, 2003 |
| 6597203 |
CMOS gate array with vertical transistors |
Jul. 22, 2003 |
| 6590419 |
Heterogeneous interconnection architecture for programmable logic devices |
Jul. 8, 2003 |
| 6586965 |
Molecular crossbar latch |
Jul. 1, 2003 |
| 6586961 |
Structure and method of repair of integrated circuits |
Jul. 1, 2003 |
| 6583649 |
Signal transmission apparatus for setting delay amount based on operational speed |
Jun. 24, 2003 |
| 6580295 |
Signal transmission system |
Jun. 17, 2003 |
| 6577165 |
Uni-sized clock buffers |
Jun. 10, 2003 |
| 6573757 |
Signal line matching technique for ICS/PCBS |
Jun. 3, 2003 |
| 6573750 |
Charge transfer device, and driving method and manufacturing method for the same |
Jun. 3, 2003 |
| 6571380 |
Integrated circuit with layout matched high speed lines |
May. 27, 2003 |
| 6567968 |
Block level routing architecture in a field programmable gate array |
May. 20, 2003 |
| 6563340 |
Architecture for implementing two chips in a package |
May. 13, 2003 |
| 6552572 |
Clock gating cell for use in a cell library |
Apr. 22, 2003 |
| 6552564 |
Technique to reduce reflections and ringing on CMOS interconnections |
Apr. 22, 2003 |
| RE38059 |
Semiconductor integrated logic circuit device using a pass transistor |
Apr. 1, 2003 |
| 6542005 |
Semiconductor integrated circuit and method of designing the same |
Apr. 1, 2003 |
| 6531889 |
Data processing system with improved latency and associated methods |
Mar. 11, 2003 |
| 6529035 |
Arrangement for improving the ESD protection in a CMOS buffer |
Mar. 4, 2003 |
| 6525563 |
Crosspoint switch circuit and switch cell electronic circuit |
Feb. 25, 2003 |
| 6526559 |
Method for creating circuit redundancy in programmable logic devices |
Feb. 25, 2003 |
| 6522173 |
Electronic device |
Feb. 18, 2003 |
| 6515506 |
Circuit for reducing pin count of a semiconductor chip and method for configuring the chip |
Feb. 4, 2003 |
| 6512396 |
High speed data processing system and method |
Jan. 28, 2003 |
| 6501301 |
Semiconductor integrated circuit and an electronic apparatus incorporating a multiplicity of semiconductor integrated circuits |
Dec. 31, 2002 |
| 6496040 |
Trading off gate delay versus leakage current using device stack effect |
Dec. 17, 2002 |
| 6496032 |
Method and structure for efficiently placing and interconnecting circuit blocks in an integrated circuit |
Dec. 17, 2002 |
| 6484294 |
Semiconductor integrated circuit and method of designing the same |
Nov. 19, 2002 |
| 6470480 |
Tracing different states reached by a signal in a functional verification system |
Oct. 22, 2002 |
| 6466053 |
Antifuse reroute of dies |
Oct. 15, 2002 |
| 6456117 |
Shield circuit and integrated circuit in which the shield circuit is used |
Sep. 24, 2002 |
| 6445214 |
Semiconductor integrated circuit |
Sep. 3, 2002 |
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