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Class Information
Number: 326/101
Name: Electronic digital logic circuitry > Significant integrated structure, layout, or layout interconnections
Description: Subject matter including an arrangement of components fabricated in a semiconductor material or integrated circuit chip with significant design emphasis on the topological arrangement of the components and their circuit connectors.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7304498 |
Clock circuitry for programmable logic devices |
Dec. 4, 2007 |
| 7304496 |
Mask-programmable logic device with programmable input/output ports |
Dec. 4, 2007 |
| 7304497 |
Methods and apparatus for programmably powering down structured application-specific integrated circuits |
Dec. 4, 2007 |
| 7301363 |
Method and system for improving communication between logic elements in an integrated circuit |
Nov. 27, 2007 |
| 7302513 |
Programmable crossbar signal processor |
Nov. 27, 2007 |
| 7292062 |
Distribution of signals throughout a spine of an integrated circuit |
Nov. 6, 2007 |
| 7292063 |
Method of interconnect for multi-slot metal-mask programmable relocatable function placed in an I/O region |
Nov. 6, 2007 |
| 7285974 |
Large scale integrated circuit |
Oct. 23, 2007 |
| 7274207 |
Semiconductor-integrated circuit utilizing magnetoresistive effect elements |
Sep. 25, 2007 |
| 7274214 |
Efficient tile layout for a programmable logic device |
Sep. 25, 2007 |
| 7274210 |
Semiconductor integrated circuit |
Sep. 25, 2007 |
| 7265580 |
Semiconductor-integrated circuit utilizing magnetoresistive effect elements |
Sep. 4, 2007 |
| 7256614 |
Scalable non-blocking switching network for programmable logic |
Aug. 14, 2007 |
| 7253662 |
Method for forming an electric device comprising power switches around a logic circuit and related apparatus |
Aug. 7, 2007 |
| 7245158 |
Circuit wiring layout in semiconductor memory device |
Jul. 17, 2007 |
| 7239174 |
Programmable interconnect structures |
Jul. 3, 2007 |
| 7209987 |
Embedded system design through simplified add-on card configuration |
Apr. 24, 2007 |
| 7200824 |
Performance/power mapping of a die |
Apr. 3, 2007 |
| 7193438 |
Configurable integrated circuit with offset connection |
Mar. 20, 2007 |
| 7187202 |
Circuit for reducing programmable logic pin counts for large scale logic |
Mar. 6, 2007 |
| 7174525 |
Integrated structure layout and layout of interconnections for an instruction execution unit of an integrated circuit chip |
Feb. 6, 2007 |
| RE39469 |
Semiconductor integrated circuit with mixed gate array and standard cell |
Jan. 16, 2007 |
| 7145361 |
Configurable integrated circuit with different connection schemes |
Dec. 5, 2006 |
| 7135888 |
Programmable routing structures providing shorter timing delays for input/output signals |
Nov. 14, 2006 |
| 7135890 |
SCL type FPGA with multi-threshold transistors and method for forming same |
Nov. 14, 2006 |
| 7132849 |
Method and apparatus for configuring the operation of an integrated circuit |
Nov. 7, 2006 |
| 7126381 |
VPA interconnect circuit |
Oct. 24, 2006 |
| 7119574 |
Passage structures for use in low-voltage applications |
Oct. 10, 2006 |
| 7112994 |
Three dimensional integrated circuits |
Sep. 26, 2006 |
| 7113002 |
Transmission cable structure for GHz frequency band signals and connector used for transmission of GHz frequency band signals |
Sep. 26, 2006 |
| 7102387 |
Periodic computation structure based on 1-input lookup tables |
Sep. 5, 2006 |
| 7098691 |
Structured integrated circuit device |
Aug. 29, 2006 |
| 7098685 |
Scalable serializer-deserializer architecture and programmable interface |
Aug. 29, 2006 |
| 7095253 |
Programmable multi-chip module |
Aug. 22, 2006 |
| 7078930 |
Integrated circuit chip with high area utilization rate |
Jul. 18, 2006 |
| 7071734 |
Programmable logic devices with silicon-germanium circuitry and associated methods |
Jul. 4, 2006 |
| 7068072 |
Integrated circuit with interface tile for coupling to a stacked-die second integrated circuit |
Jun. 27, 2006 |
| 7064579 |
Alterable application specific integrated circuit (ASIC) |
Jun. 20, 2006 |
| 7064574 |
PLD memory cells utilizing metal-to-metal capacitors to selectively reduce susceptibility to single event upsets |
Jun. 20, 2006 |
| 7064580 |
Mask-programmable logic device with programmable portions |
Jun. 20, 2006 |
| 7049846 |
Clock tree network in a field programmable gate array |
May. 23, 2006 |
| 7036105 |
Integrated circuits with at least one layer that has more than one preferred interconnect direction, and method for manufacturing such IC's |
Apr. 25, 2006 |
| 7028282 |
Integrated circuit with layout matched high speed lines |
Apr. 11, 2006 |
| 7024653 |
Architecture for efficient implementation of serial data communication functions on a programmable logic device (PLD) |
Apr. 4, 2006 |
| 7007111 |
DMA port sharing bandwidth balancing logic |
Feb. 28, 2006 |
| 6998876 |
Coaxial clock tree for programmable logic devices |
Feb. 14, 2006 |
| 6978434 |
Method of designing wiring structure of semiconductor device and wiring structure designed accordingly |
Dec. 20, 2005 |
| 6975139 |
Scalable non-blocking switching network for programmable logic |
Dec. 13, 2005 |
| 6973634 |
IC layouts with at least one layer that has more than one preferred interconnect direction, and method and apparatus for generating such a layout |
Dec. 6, 2005 |
| 6958519 |
Methods of forming field effect transistors and field effect transistor circuitry |
Oct. 25, 2005 |
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