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Class Information
Number: 257/E29.269
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Semiconductors devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (epo) > Types of semiconductor device (epo) > Controllable by only signal applied to control electrode (e.g., base of bipolar transistor, gate of field-effect transistor) (epo) > Unipolar device (epo) > Field-effect transistor (epo) > With field effect produced by insulated gate (epo) > With lightly doped drain or source extension (epo) > With overlap between lightly doped extension and gate electrode (epo)
Description: This subclass is indented under subclass E29.266. This subclass is substantially the same in scope as ECLA classification H01L29/78F4.


Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
7592669 Semiconductor device with MISFET that includes embedded insulating film arranged between source/drain regions and channel Sep. 22, 2009
7579660 Semiconductor device and manufacturing method thereof Aug. 25, 2009
7525158 Semiconductor device having pixel electrode and peripheral circuit Apr. 28, 2009
7453088 Electro-optical device and manufacturing method thereof Nov. 18, 2008
7420241 Semiconductor memory device and method of manufacturing the same Sep. 2, 2008
7355245 Structure for reducing overlap capacitance in field effect transistors Apr. 8, 2008
7227227 Reduced leakage semiconductor device Jun. 5, 2007
7112844 Semiconductor device and manufacturing method thereof Sep. 26, 2006
7060599 Method of forming shallow doped junctions having a variable profile gradation of dopants Jun. 13, 2006
6974997 High-voltage MOS transistor Dec. 13, 2005
6933575 Semiconductor device and its manufacturing method Aug. 23, 2005
6911695 Transistor having insulating spacers on gate sidewalls to reduce overlap between the gate and doped extension regions of the source and drain Jun. 28, 2005
6902958 Method for making MOSFET anti-fuse structure Jun. 7, 2005
6884643 Semiconductor device, method for evaluating the same, and method for fabricating the same Apr. 26, 2005
6884688 Method for producing a MOS transistor and MOS transistor Apr. 26, 2005
6876045 Semiconductor device and process for manufacturing the same Apr. 5, 2005
6700176 MOSFET anti-fuse structure and method for making same Mar. 2, 2004
6680224 Methods of forming and operating field effect transistors having gate and sub-gate electrodes Jan. 20, 2004
6646462 Extraction of drain junction overlap with the gate and the channel length for ultra-small CMOS devices with ultra-thin gate oxides Nov. 11, 2003
6593623 Reduced channel length lightly doped drain transistor using a sub-amorphous large tilt angle implant to provide enhanced lateral diffusion Jul. 15, 2003
6576965 Semiconductor device with lightly doped drain layer Jun. 10, 2003
6563151 Field effect transistors having gate and sub-gate electrodes that utilize different work function materials and methods of forming same May. 13, 2003
6562687 MIS transistor and method for making same on a semiconductor substrate May. 13, 2003
6514824 Semiconductor device with a pair of transistors having dual work function gate electrodes Feb. 4, 2003
6498077 Semiconductor device and method of manufacturing same Dec. 24, 2002
6468843 MIS semiconductor device having an LDD structure and a manufacturing method therefor Oct. 22, 2002
6461924 MOS transistor for high-speed and high-performance operation and manufacturing method thereof Oct. 8, 2002
6407436 Semiconductor device with abrupt source/drain extensions with controllable gate electrode overlap Jun. 18, 2002
6359310 Shallow doped junctions with a variable profile gradation of dopants Mar. 19, 2002
6300207 Depleted sidewall-poly LDD transistor Oct. 9, 2001
6284577 MIS semiconductor device having an LDD structure and a manufacturing method therefor Sep. 4, 2001
6284613 Method for forming a T-gate for better salicidation Sep. 4, 2001
6277699 Method for forming a metal-oxide-semiconductor transistor Aug. 21, 2001
6274906 MOS transistor for high-speed and high-performance operation and manufacturing method thereof Aug. 14, 2001
6274446 Method for fabricating abrupt source/drain extensions with controllable gate electrode overlap Aug. 14, 2001
6268640 Forming steep lateral doping distribution at source/drain junctions Jul. 31, 2001
6211555 Semiconductor device with a pair of transistors having dual work function gate electrodes Apr. 3, 2001
6207997 Thin film transistor for antistatic circuit and method for fabricating the same Mar. 27, 2001
6180471 Method of fabricating high voltage semiconductor device Jan. 30, 2001
6169315 Metal oxide semiconductor field effect transistor (MOSFET) and method for making thereof Jan. 2, 2001
6124174 Spacer structure as transistor gate Sep. 26, 2000
6091118 Semiconductor device having reduced overlap capacitance and method of manufacture thereof Jul. 18, 2000
6071825 Fully overlapped nitride-etch defined device and processing sequence Jun. 6, 2000
6037630 Semiconductor device with gate electrode portion and method of manufacturing the same Mar. 14, 2000
5977591 High-voltage-resistant MOS transistor, and corresponding manufacturing process Nov. 2, 1999
5970353 Reduced channel length lightly doped drain transistor using a sub-amorphous large tilt angle implant to provide enhanced lateral diffusion Oct. 19, 1999
5930592 Asymmetrical n-channel transistor having LDD implant only in the drain region Jul. 27, 1999
5920104 Reducing reverse short-channel effect with light dose of P with high dose of as in n-channel LDD Jul. 6, 1999
5918134 Method of reducing transistor channel length with oxidation inhibiting spacers Jun. 29, 1999
5912492 Integrated circuit structure incorporating a metal oxide semiconductor field effect transistor (MOSFET) having improved hot carrier immunity Jun. 15, 1999

1 2 3 4 5


 
 
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