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Class Information
Number: 257/E29.19
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Semiconductors devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (epo) > Types of semiconductor device (epo) > Controllable by only signal applied to control electrode (e.g., base of bipolar transistor, gate of field-effect transistor) (epo) > Bipolar device (epo) > Transistor-type device (i.e., able to continuously respond to applied control signal) > Bipolar junction transistor > Hetero-junction transistor (epo) > Vertical transistors (epo) > Having two-dimensional base (e.g., modulation-doped base, inversion layer base, delta-doped base) (epo)
Description: This subclass is indented under subclass E29.189. This subclass is substantially the same in scope as ECLA classification H01L29/737B2.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 8643076 |
Non-volatile memory device and method for fabricating the same |
Feb. 4, 2014 |
| 8384130 |
Nitride semiconductor device having a two-dimensional electron gas (2DEG) channel |
Feb. 26, 2013 |
| 8115268 |
Solid-state imaging device with channel stop region with multiple impurity regions in depth direction and method for manufacturing the same |
Feb. 14, 2012 |
| 8022506 |
SOI device with more immunity from substrate voltage |
Sep. 20, 2011 |
| 7911024 |
Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof |
Mar. 22, 2011 |
| 7872330 |
Bipolar transistor with enhanced base transport |
Jan. 18, 2011 |
| 7808102 |
Multi-die DC-DC boost power converter with efficient packaging |
Oct. 5, 2010 |
| 7538412 |
Semiconductor device with a field stop zone |
May. 26, 2009 |
| 7429747 |
Sb-based CMOS devices |
Sep. 30, 2008 |
| 7375410 |
Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof |
May. 20, 2008 |
| 7102205 |
Bipolar transistor with extrinsic stress layer |
Sep. 5, 2006 |
| 6787822 |
Heterojunction III-V transistor, in particular HEMT field effect transistor or heterojunction bipolar transistor |
Sep. 7, 2004 |
| 5965931 |
Bipolar transistor having base region with coupled delta layers |
Oct. 12, 1999 |
| 5904536 |
Self aligned poly emitter bipolar technology using damascene technique |
May. 18, 1999 |
| 5798539 |
Bipolar transistor for very high frequencies |
Aug. 25, 1998 |
| 5567961 |
Semiconductor device |
Oct. 22, 1996 |
| 5381027 |
Semiconductor device having a heterojunction and a two dimensional gas as an active layer |
Jan. 10, 1995 |
| 5293084 |
High speed logic circuit |
Mar. 8, 1994 |
| 5258631 |
Semiconductor device having a two-dimensional electron gas as an active layer |
Nov. 2, 1993 |
| 5241197 |
Transistor provided with strained germanium layer |
Aug. 31, 1993 |
| 5099299 |
Modulation doped base heterojunction bipolar transistor |
Mar. 24, 1992 |
| 4926221 |
Bipolar hot electron transistor |
May. 15, 1990 |
| 4825269 |
Double heterojunction inversion base transistor |
Apr. 25, 1989 |
| 4825265 |
Transistor |
Apr. 25, 1989 |
| 4811070 |
Heterojunction bipolar transistor with inversion layer base |
Mar. 7, 1989 |
| 4800415 |
Bipolar inversion channel device |
Jan. 24, 1989 |
| 4326208 |
Semiconductor inversion layer transistor |
Apr. 20, 1982 |
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