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Class Information
Number: 257/E29.063
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Semiconductors devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (epo) > Electrical characteristics due to properties of entire semiconductor body rather than just surface region (epo) > Characterized by specified shape or size of pn junction or by specified impurity concentration gradient within the device (epo) > With semiconductor regions connected to electrode not carrying current to be rectified, amplified or switched and such electrode being part of semiconductor device which comprises three or more electrodes (epo) > Substrate region of field-effect devices (epo) > Of field-effect transistors (epo) > With insulated gate (epo) > With inactive supplementary region (e.g., for preventing punch-through, improving capacity effect or leakage current) (epo)
Description: This subclass is indented under subclass E29.062. This subclass is substantially the same in scope as ECLA classification H01L29/10F2B2.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7615826 |
Electrostatic discharge protection semiconductor structure |
Nov. 10, 2009 |
| 7608515 |
Diffusion layer for stressed semiconductor devices |
Oct. 27, 2009 |
| 7602017 |
Short channel LV, MV, and HV CMOS devices |
Oct. 13, 2009 |
| 7598146 |
Self-aligned gate and method |
Oct. 6, 2009 |
| 7579658 |
Devices without current crowding effect at the finger's ends |
Aug. 25, 2009 |
| 7534689 |
Stress enhanced MOS transistor and methods for its fabrication |
May. 19, 2009 |
| 7521342 |
Semiconductor structure with high-voltage sustaining capability and fabrication method of the same |
Apr. 21, 2009 |
| 7432551 |
SOI semiconductor device including a guard ring region |
Oct. 7, 2008 |
| 7400016 |
Semiconductor device realizing characteristics like a SOI MOSFET |
Jul. 15, 2008 |
| 7279767 |
Semiconductor structure with high-voltage sustaining capability and fabrication method of the same |
Oct. 9, 2007 |
| 7071069 |
Shallow amorphizing implant for gettering of deep secondary end of range defects |
Jul. 4, 2006 |
| 7067878 |
Field effect transistor |
Jun. 27, 2006 |
| 7067406 |
Thermal conducting trench in a semiconductor structure and method for forming the same |
Jun. 27, 2006 |
| 7064039 |
Method to produce localized halo for MOS transistor |
Jun. 20, 2006 |
| 7064399 |
Advanced CMOS using super steep retrograde wells |
Jun. 20, 2006 |
| 7061059 |
Semiconductor device |
Jun. 13, 2006 |
| 7052965 |
Methods of fabricating MOS field effect transistors with pocket regions using implant blocking patterns |
May. 30, 2006 |
| 7049669 |
LDMOS transistor |
May. 23, 2006 |
| 7041549 |
Method for manufacturing semiconductor device |
May. 9, 2006 |
| 7042051 |
Semiconductor device including impurity layer having a plurality of impurity peaks formed beneath the channel region |
May. 9, 2006 |
| 7038270 |
Nonvolatile memory device with a non-planar gate-insulating layer and method of fabricating the same |
May. 2, 2006 |
| 7009261 |
Semiconductor device and method of manufacturing the same |
Mar. 7, 2006 |
| 7009255 |
Semiconductor device having punch-through structure off-setting the edge of the gate electrodes |
Mar. 7, 2006 |
| 6998680 |
Semiconductor device |
Feb. 14, 2006 |
| 6989309 |
High voltage MOS transistor with up-retro well by providing dopant in an epitaxial layer |
Jan. 24, 2006 |
| 6972475 |
Semiconductor device |
Dec. 6, 2005 |
| 6972234 |
High voltage MOS devices with high gated-diode breakdown voltage and punch-through voltage |
Dec. 6, 2005 |
| 6946353 |
Low voltage high performance semiconductor devices and methods |
Sep. 20, 2005 |
| 6940137 |
Semiconductor device having an angled compensation implant and method of manufacture therefor |
Sep. 6, 2005 |
| 6930361 |
Semiconductor device realizing characteristics like a SOI MOSFET |
Aug. 16, 2005 |
| 6921933 |
Semiconductor device and method of fabricating the same |
Jul. 26, 2005 |
| 6914294 |
Semiconductor device |
Jul. 5, 2005 |
| 6911696 |
LDMOS transistor |
Jun. 28, 2005 |
| 6911384 |
Gate structure with independently tailored vertical doping profile |
Jun. 28, 2005 |
| 6894348 |
Semiconductor device |
May. 17, 2005 |
| 6888207 |
High voltage transistors with graded extension |
May. 3, 2005 |
| 6887762 |
Method of fabricating a field effect transistor structure with abrupt source/drain junctions |
May. 3, 2005 |
| 6882023 |
Floating resurf LDMOSFET and method of manufacturing same |
Apr. 19, 2005 |
| 6879006 |
MOS transistor and method for fabricating the same |
Apr. 12, 2005 |
| 6878996 |
MOS power transistor |
Apr. 12, 2005 |
| 6875666 |
Methods of manufacturing transistors and transistors having an anti-punchthrough region |
Apr. 5, 2005 |
| 6861689 |
One transistor DRAM cell structure and method for forming |
Mar. 1, 2005 |
| 6858507 |
Graded LDD implant process for sub-half-micron MOS devices |
Feb. 22, 2005 |
| 6855984 |
Process to reduce gate edge drain leakage in semiconductor devices |
Feb. 15, 2005 |
| 6847089 |
Gate edge diode leakage reduction |
Jan. 25, 2005 |
| 6828631 |
High-voltage transistor with multi-layer conduction region |
Dec. 7, 2004 |
| 6822297 |
Additional n-type LDD/pocket implant for improving short-channel NMOS ESD robustness |
Nov. 23, 2004 |
| 6818493 |
Selective metal oxide removal performed in a reaction chamber in the absence of RF activation |
Nov. 16, 2004 |
| 6808997 |
Complementary junction-narrowing implants for ultra-shallow junctions |
Oct. 26, 2004 |
| 6806128 |
Semiconductor integrated circuit device and a method of manufacturing the same |
Oct. 19, 2004 |
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