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Class Information
Number: 257/E29.056
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Semiconductors devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (epo) > Electrical characteristics due to properties of entire semiconductor body rather than just surface region (epo) > Characterized by specified shape or size of pn junction or by specified impurity concentration gradient within the device (epo) > With semiconductor regions connected to electrode not carrying current to be rectified, amplified or switched and such electrode being part of semiconductor device which comprises three or more electrodes (epo) > Channel region of field-effect devices (epo) > Of field-effect transistors (epo) > With insulated gate (epo) > With variation of composition of channel (epo)
Description: This subclass is indented under subclass E29.051. This subclass is substantially the same in scope as ECLA classification H01L29/10D2B4.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6872641 Strained silicon on relaxed sige film with uniform misfit dislocation density Mar. 29, 2005
6872989 Semiconductor device and method for fabricating the same Mar. 29, 2005
6872455 Semiconductor material and method for enhancing solubility of a dopant therein Mar. 29, 2005
6869897 Manufacturing method for semiconductor substrate, and semiconductor device having a strained Si layer Mar. 22, 2005
6867428 Strained silicon NMOS having silicon source/drain extensions and method for its fabrication Mar. 15, 2005
6861316 Semiconductor device and method for fabricating the same Mar. 1, 2005
6861318 Semiconductor transistor having a stressed channel Mar. 1, 2005
6858506 Method for fabricating locally strained channel Feb. 22, 2005
6858503 Depletion to avoid cross contamination Feb. 22, 2005
6858502 High speed composite p-channel Si/SiGe heterostructure for field effect devices Feb. 22, 2005
6855990 Strained-channel multiple-gate transistor Feb. 15, 2005
6852600 Strained silicon MOSFET having silicon source/drain regions and method for its fabrication Feb. 8, 2005
6849884 Strained Fin FETs structure and method Feb. 1, 2005
6849527 Strained silicon MOSFET having improved carrier mobility, strained silicon CMOS device, and methods of their formation Feb. 1, 2005
6849883 Strained SOI MOSFET device and method of fabricating same Feb. 1, 2005
6849508 Method of forming multiple gate insulators on a strained semiconductor heterostructure Feb. 1, 2005
6846715 Gate technology for strained surface channel and strained buried channel MOSFET devices Jan. 25, 2005
6846720 Method to reduce junction leakage current in strained silicon on silicon-germanium devices Jan. 25, 2005
6847098 Non-floating body device with enhanced performance Jan. 25, 2005
6841430 Semiconductor and fabrication method thereof Jan. 11, 2005
6838728 Buried-channel devices and substrates for fabrication of semiconductor-based devices Jan. 4, 2005
6835618 Epitaxially grown fin for FinFET Dec. 28, 2004
6833294 Method for making semiconductor device including band-engineered superlattice Dec. 21, 2004
6830964 Method for making semiconductor device including band-engineered superlattice Dec. 14, 2004
6830976 Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits Dec. 14, 2004
6831350 Semiconductor structure with different lattice constant materials and method for forming the same Dec. 14, 2004
6831292 Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same Dec. 14, 2004
6825507 Semiconductor device having high electron mobility comprising a SiGe/Si/SiGe substrate Nov. 30, 2004
6815738 Multiple gate MOSFET structure with strained Si Fin body Nov. 9, 2004
6815735 Semiconductor device Nov. 9, 2004
6815278 Ultra-thin silicon-on-insulator and strained-silicon-direct-on-insulator with hybrid crystal orientations Nov. 9, 2004
6815310 Technique to obtain high mobility channels in MOS transistors by forming a strain layer on an underside of a channel Nov. 9, 2004
6812116 Method of fabricating a wafer with strained channel layers for increased electron and hole mobility for improving device performance Nov. 2, 2004
6809016 Diffusion stop implants to suppress as punch-through in SiGe Oct. 26, 2004
6808970 Semiconductor device having an improved strained surface layer and method of forming a strained surface layer in a semiconductor device Oct. 26, 2004
6803631 Strained channel finfet Oct. 12, 2004
6800910 FinFET device incorporating strained silicon in the channel region Oct. 5, 2004
6787883 Silicon-germanium devices for CMOS formed by ion implantation and solid phase epitaxial regrowth Sep. 7, 2004
6787423 Strained-silicon semiconductor device Sep. 7, 2004
6787864 Mosfets incorporating nickel germanosilicided gate and methods for their formation Sep. 7, 2004
6784035 Field effect transistor having source and/or drain forming Schottky or Schottky-like contact with strained semiconductor substrate Aug. 31, 2004
6781163 Heterojunction field effect transistor Aug. 24, 2004
6777728 Semiconductor device and complementary semiconductor device Aug. 17, 2004
6774409 Semiconductor device with NMOS including Si:C channel region and/or PMOS including SiGe channel region Aug. 10, 2004
6767793 Strained fin FETs structure and method Jul. 27, 2004
6768156 Non-volatile random access memory cells associated with thin film constructions Jul. 27, 2004
6764908 Narrow width CMOS devices fabricated on strained lattice semiconductor substrates with maximized NMOS and PMOS drive currents Jul. 20, 2004
6765227 Semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer and method of fabrication using wafer bonding Jul. 20, 2004
6756276 Strained silicon MOSFET having improved source/drain extension dopant diffusion resistance and method for its fabrication Jun. 29, 2004
6750486 Semiconductor and fabrication method thereof Jun. 15, 2004

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