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Class Information
Number: 257/E27.11
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Device consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate, e.g., integrated circuit device (epo) > Including semiconductor component with at least one potential barrier or surface barrier adapted for rectifying, oscillating, amplifying, or switching, or including integrated passive circuit elements (epo) > With semiconductor substrate only (epo) > Including a plurality of individual components in a repetitive configuration (epo) > Masterslice integrated circuit (epo) > Input and output buffer/driver (epo)
Description: This subclass is indented under subclass E27.105. This subclass is substantially the same in scope as ECLA classification H01L27/118P.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7566923 |
Isolated power domain core regions in platform ASICs |
Jul. 28, 2009 |
| 7521735 |
Multiple layer and crystal plane orientation semiconductor substrate |
Apr. 21, 2009 |
| 7514728 |
Semiconductor integrated circuit device using four-terminal transistors |
Apr. 7, 2009 |
| 7385223 |
Flat panel display with thin film transistor |
Jun. 10, 2008 |
| 7365377 |
Semiconductor integrated circuit device using four-terminal transistors |
Apr. 29, 2008 |
| 7348610 |
Multiple layer and crystal plane orientation semiconductor substrate |
Mar. 25, 2008 |
| 7282803 |
Integrated electronic circuit comprising a capacitor and a planar interference inhibiting metallic screen |
Oct. 16, 2007 |
| 7148511 |
Active matrix substrate, electro-optical device, electronic device, and method for manufacturing an active matrix substrate |
Dec. 12, 2006 |
| 7138698 |
Semiconductor device including power MOS field-effect transistor and driver circuit driving thereof |
Nov. 21, 2006 |
| 7030651 |
Programmable structured arrays |
Apr. 18, 2006 |
| 7030551 |
Area sensor and display apparatus provided with an area sensor |
Apr. 18, 2006 |
| 6924661 |
Power switch circuit sizing technique |
Aug. 2, 2005 |
| 6903575 |
Scalable device architecture for high-speed interfaces |
Jun. 7, 2005 |
| 6836026 |
Integrated circuit design for both input output limited and core limited integrated circuits |
Dec. 28, 2004 |
| 6780745 |
Semiconductor integrated circuit and method of manufacturing the same |
Aug. 24, 2004 |
| 6735755 |
Cost saving methods using pre-defined integrated circuit modules |
May. 11, 2004 |
| 6725443 |
Integrated circuit template cell system and method |
Apr. 20, 2004 |
| 6601225 |
Semiconductor device having definite size of input/output blocks and its designing method |
Jul. 29, 2003 |
| 6564362 |
Method of designing a layout of an LSI chip, and a computer product |
May. 13, 2003 |
| 6502231 |
Integrated circuit template cell system and method |
Dec. 31, 2002 |
| 6433983 |
High performance output buffer with ESD protection |
Aug. 13, 2002 |
| 6313665 |
Semiconductor integrated circuit |
Nov. 6, 2001 |
| 6310402 |
Semiconductor die having input/output cells and contact pads in the periphery of a substrate |
Oct. 30, 2001 |
| 6222213 |
Semiconductor integrated circuit device |
Apr. 24, 2001 |
| 6207980 |
Layout method of a semiconductor device |
Mar. 27, 2001 |
| 5962899 |
Electrostatic discharge protection circuit |
Oct. 5, 1999 |
| 5914516 |
Buffer circuit with wide gate input transistor |
Jun. 22, 1999 |
| 5859448 |
Alternative silicon chip geometries for integrated circuits |
Jan. 12, 1999 |
| 5796299 |
Integrated circuit array including I/O cells and power supply cells |
Aug. 18, 1998 |
| 5777510 |
High voltage tolerable pull-up driver and method for operating same |
Jul. 7, 1998 |
| 5773854 |
Method of fabricating a linearly continuous integrated circuit gate array |
Jun. 30, 1998 |
| 5773856 |
Structure for connecting to integrated circuitry |
Jun. 30, 1998 |
| 5760428 |
Variable width low profile gate array input/output architecture |
Jun. 2, 1998 |
| 5751179 |
Output driver for PCI bus |
May. 12, 1998 |
| 5714796 |
Integrated circuit device fabricated on semiconductor substrate blocking power supply lines from noise |
Feb. 3, 1998 |
| 5698903 |
Bond pad option for integrated circuits |
Dec. 16, 1997 |
| 5694078 |
Semiconductor integrated circuit having regularly arranged transistor basic cells |
Dec. 2, 1997 |
| 5659189 |
Layout configuration for an integrated circuit gate array |
Aug. 19, 1997 |
| 5656970 |
Method and structure for selectively coupling a resistive element, a bulk potential control circuit and a gate control circuit to an output driver circuit |
Aug. 12, 1997 |
| 5650348 |
Method of making an integrated circuit chip having an array of logic gates |
Jul. 22, 1997 |
| 5618740 |
Method of making CMOS output buffer with enhanced ESD resistance |
Apr. 8, 1997 |
| 5619048 |
Semiconductor integrated circuit device |
Apr. 8, 1997 |
| 5610417 |
Integrated circuit with variable pad pitch |
Mar. 11, 1997 |
| 5565386 |
Method of connecting to integrated circuitry |
Oct. 15, 1996 |
| 5563438 |
Rugged CMOS output stage design |
Oct. 8, 1996 |
| 5552618 |
Multi-voltage-lever master-slice integrated circuit |
Sep. 3, 1996 |
| 5552333 |
Method for designing low profile variable width input/output cells |
Sep. 3, 1996 |
| 5547887 |
Method of making a CMOS output pad driver with variable drive currents, ESD protection and improved leakage current behavior |
Aug. 20, 1996 |
| 5546033 |
Output driver circuits with enhanced supply-line bounce control and improved VOH characteristic |
Aug. 13, 1996 |
| 5543651 |
Semiconductor integrated circuit device |
Aug. 6, 1996 |
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