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Class Information
Number: 257/E27.099
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Device consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate, e.g., integrated circuit device (epo) > Including semiconductor component with at least one potential barrier or surface barrier adapted for rectifying, oscillating, amplifying, or switching, or including integrated passive circuit elements (epo) > With semiconductor substrate only (epo) > Including a plurality of individual components in a repetitive configuration (epo) > Including field-effect component (epo) > Static random access memory, sram, structure (epo) > Load element being a mosfet transistor (epo)
Description: OLE_LINK1This subclass is indented under subclass E27.098. This subclass is substantially the same in scope as ECLA classification OLE_LINK1 H01L27/11F.










Sub-classes under this class:

Class Number Class Name Patents
257/E27.1 Load element being a thin film transistor (epo) 392


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13

Patent Number Title Of Patent Date Issued
5394358 SRAM memory cell with tri-level local interconnect Feb. 28, 1995
5363324 Full CMOS type SRAM and method of manufacturing same Nov. 8, 1994
5347152 Stacked CMOS latch with cross-coupled capacitors Sep. 13, 1994
5340762 Method of making small contactless RAM cell Aug. 23, 1994
5341324 Semiconductor device and manufacturing method thereof Aug. 23, 1994
5338963 Soft error immune CMOS static RAM cell Aug. 16, 1994
5332688 Method of manufacturing full CMOS type SRAM Jul. 26, 1994
5332903 p-MOSFET total dose dosimeter Jul. 26, 1994
5331164 Particle sensor array Jul. 19, 1994
5330933 Method for fabricating semiconductor circuits Jul. 19, 1994
5324961 Stacked capacitor SRAM cell Jun. 28, 1994
5325338 Dual port memory, such as used in color lookup tables for video systems Jun. 28, 1994
5310694 Method for forming a transistor device with resistive coupling May. 10, 1994
5302539 VLSI interconnect method and structure Apr. 12, 1994
5296726 High value resistive load for an integrated circuit Mar. 22, 1994
5258635 MOS-type semiconductor integrated circuit device Nov. 2, 1993
5241495 Semiconductor memory Aug. 31, 1993
5239196 SRAM with dual word lines overlapping drive transistor gates Aug. 24, 1993
5229307 Method of making extended silicide and external contact Jul. 20, 1993
5227316 Method of forming self aligned extended base contact for a bipolar transistor having reduced cell size Jul. 13, 1993
5227649 Circuit layout and method for VLSI circuits having local interconnects Jul. 13, 1993
5222039 Static random access memory (SRAM) including Fermi-threshold field effect transistors Jun. 22, 1993
5206533 Transistor device with resistive coupling Apr. 27, 1993
5204990 Memory cell with capacitance for single event upset protection Apr. 20, 1993
5198683 Integrated circuit memory device and structural layout thereof Mar. 30, 1993
5196233 Method for fabricating semiconductor circuits Mar. 23, 1993
5194749 Semiconductor integrated circuit device Mar. 16, 1993
5185723 Semiconductor integrated circuit device having load means Feb. 9, 1993
5173754 Integrated circuit device with gate in sidewall Dec. 22, 1992
5166771 Self-aligning contact and interconnect structure Nov. 24, 1992
5166902 SRAM memory cell Nov. 24, 1992
5135888 Field effect device with polycrystalline silicon channel Aug. 4, 1992
5132771 Semiconductor memory device having flip-flop circuits Jul. 21, 1992
5128731 Static random access memory cell using a P/N-MOS transistors Jul. 7, 1992
5126279 Single polysilicon cross-coupled resistor, six-transistor SRAM cell design technique Jun. 30, 1992
5124774 Compact SRAM cell layout Jun. 23, 1992
5122846 Bistable logic device using trench transistors Jun. 16, 1992
5111429 Single event upset hardening CMOS memory circuit May. 5, 1992
5100824 Method of making small contactless RAM cell Mar. 31, 1992
5097448 Semiconductor memory device capable of relieving defective bits Mar. 17, 1992
5072286 Semiconductor memory device having memory cells including IG FETs in a symmetrical arrangement Dec. 10, 1991
5072275 Small contactless RAM cell Dec. 10, 1991
5061986 Self-aligned extended base contact for a bipolar transistor having reduced cell size and improved electrical characteristics Oct. 29, 1991
5053848 Apparatus for providing single event upset resistance for semiconductor devices Oct. 1, 1991
5051952 Semiconductor memory device having capacitors through which data read/write is carried out Sep. 24, 1991
5045916 Extended silicide and external contact technology Sep. 3, 1991
5034797 Semiconductor memory devices having stacked polycrystalline silicon transistors Jul. 23, 1991
5025301 DRAM which uses MISFETS in the peripheral circuit Jun. 18, 1991
5016070 Stacked CMOS sRAM with vertical transistors and cross-coupled capacitors May. 14, 1991
5001539 Multiple layer static random access memory device Mar. 19, 1991

1 2 3 4 5 6 7 8 9 10 11 12 13










 
 
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