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Class Information
Number: 257/E27.099
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Device consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate, e.g., integrated circuit device (epo) > Including semiconductor component with at least one potential barrier or surface barrier adapted for rectifying, oscillating, amplifying, or switching, or including integrated passive circuit elements (epo) > With semiconductor substrate only (epo) > Including a plurality of individual components in a repetitive configuration (epo) > Including field-effect component (epo) > Static random access memory, sram, structure (epo) > Load element being a mosfet transistor (epo)
Description: OLE_LINK1This subclass is indented under subclass E27.098. This subclass is substantially the same in scope as ECLA classification OLE_LINK1 H01L27/11F.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5742086 |
Hexagonal DRAM array |
Apr. 21, 1998 |
| 5734187 |
Memory cell design with vertically stacked crossovers |
Mar. 31, 1998 |
| 5731219 |
Process for fabricating a semiconductor integrated circuit device |
Mar. 24, 1998 |
| 5717254 |
Semiconductor device including a plurality of transistors |
Feb. 10, 1998 |
| 5710449 |
Memory cell having active regions without N+ implants |
Jan. 20, 1998 |
| 5705409 |
Method for forming trench transistor structure |
Jan. 6, 1998 |
| 5706226 |
Low voltage CMOS SRAM |
Jan. 6, 1998 |
| 5703392 |
Minimum size integrated circuit static memory cell |
Dec. 30, 1997 |
| 5700705 |
Semiconductor integrated circuit device |
Dec. 23, 1997 |
| 5700704 |
Process for fabricating a semiconductor integrated circuit device |
Dec. 23, 1997 |
| 5691561 |
Semiconductor device and method for manufacturing semiconductor device |
Nov. 25, 1997 |
| 5687111 |
Static type semiconductor memory device capable of operating at a low voltage and reducing a memory cell area |
Nov. 11, 1997 |
| 5677866 |
Semiconductor memory device |
Oct. 14, 1997 |
| 5670803 |
Three-dimensional SRAM trench structure and fabrication method therefor |
Sep. 23, 1997 |
| 5670424 |
Method for making local interconnect structure |
Sep. 23, 1997 |
| 5656836 |
Semiconductor integrated circuit device and process for fabricating the same |
Aug. 12, 1997 |
| 5654239 |
Method of manufacturing a contact structure of an interconnection layer for a semiconductor device and a multilayer interconnection SRAM |
Aug. 5, 1997 |
| 5654572 |
Static random access memory device |
Aug. 5, 1997 |
| 5652457 |
Semiconductor integrated circuit device and process for fabricating the same |
Jul. 29, 1997 |
| 5646423 |
Semiconductor integrated circuit device |
Jul. 8, 1997 |
| 5621232 |
Semiconductor device including a local interconnection between an interconnection layer and an adjoining impurity region |
Apr. 15, 1997 |
| 5619055 |
Semiconductor integrated circuit device |
Apr. 8, 1997 |
| 5598020 |
Semiconductor integrated circuit device and method of manufacturing the same |
Jan. 28, 1997 |
| 5594270 |
Semiconductor memory device |
Jan. 14, 1997 |
| 5592011 |
Single layer thin film transistor static random access memory cell |
Jan. 7, 1997 |
| 5581093 |
Contact structure of an interconnection layer for a semiconductor device and a multilayer interconnection SRAM |
Dec. 3, 1996 |
| 5578840 |
Microelectronic integrated circuit structure and method using three directional interconnect routing based on hexagonal geometry |
Nov. 26, 1996 |
| 5576560 |
Dual port memory, such as used in color lookup tables for video systems |
Nov. 19, 1996 |
| 5572480 |
Semiconductor integrated circuit device and process for fabricating the same |
Nov. 5, 1996 |
| 5554874 |
Six-transistor cell with wide bit-line pitch, double words lines, and bit-line contact shared among four cells |
Sep. 10, 1996 |
| 5554870 |
Integrated circuit having both vertical and horizontal devices and process for making the same |
Sep. 10, 1996 |
| 5550396 |
Vertical field effect transistor with a trench structure |
Aug. 27, 1996 |
| 5541427 |
SRAM cell with capacitor |
Jul. 30, 1996 |
| 5541431 |
Semiconductor device having transistor pair |
Jul. 30, 1996 |
| 5523598 |
Semiconductor integrated circuit device |
Jun. 4, 1996 |
| 5523966 |
Memory cell and a memory device having reduced soft error |
Jun. 4, 1996 |
| 5521861 |
High-speed high-density SRAM cell |
May. 28, 1996 |
| 5521860 |
CMOS static memory |
May. 28, 1996 |
| 5510292 |
Manufacturing method for a semiconductor device having local interconnections |
Apr. 23, 1996 |
| 5494843 |
Method for forming MOSFET devices |
Feb. 27, 1996 |
| 5489797 |
Local interconnect structure |
Feb. 6, 1996 |
| 5483083 |
Semiconductor integrated circuit device |
Jan. 9, 1996 |
| 5483104 |
Self-aligning contact and interconnect structure |
Jan. 9, 1996 |
| 5478771 |
Method of forming local interconnect structure without P-N junction between active elements |
Dec. 26, 1995 |
| 5477501 |
Semiconductor random access memory device having digit lines selectively extending on inter-level insulating layers |
Dec. 19, 1995 |
| 5475240 |
Contact structure of an interconnection layer for a semiconductor device and a multilayer interconnection SRAM |
Dec. 12, 1995 |
| 5452245 |
Memory efficient gate array cell |
Sep. 19, 1995 |
| 5451534 |
Method of making single layer thin film transistor static random access memory cell |
Sep. 19, 1995 |
| 5396100 |
Semiconductor integrated circuit device having a compact arrangement of SRAM cells |
Mar. 7, 1995 |
| 5396169 |
Method for characterizing the upset response of CMOS circuits using alpha-particle sensitive test circuits |
Mar. 7, 1995 |
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