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Class Information
Number: 257/E27.096
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Device consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate, e.g., integrated circuit device (epo) > Including semiconductor component with at least one potential barrier or surface barrier adapted for rectifying, oscillating, amplifying, or switching, or including integrated passive circuit elements (epo) > With semiconductor substrate only (epo) > Including a plurality of individual components in a repetitive configuration (epo) > Including field-effect component (epo) > Dynamic random access memory, dram, structure (epo) > One-transistor memory cell structure, i.e., each memory cell containing only one transistor (epo) > Capacitor and transistor in common trench (epo) > Vertical transistor (epo)
Description: This subclass is indented under subclass E27.095. This subclass is substantially the same in scope as ECLA classification H01L27/108F10V.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7608506 |
Body-contacted semiconductor structures and methods of fabricating such body-contacted semiconductor structures |
Oct. 27, 2009 |
| 7586130 |
Vertical field effect transistor using linear structure as a channel region and method for fabricating the same |
Sep. 8, 2009 |
| 7569876 |
DRAM arrays, vertical transistor structures, and methods of forming transistor structures and DRAM arrays |
Aug. 4, 2009 |
| 7528439 |
Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array |
May. 5, 2009 |
| 7485910 |
Simplified vertical array device DRAM/eDRAM integration: method and structure |
Feb. 3, 2009 |
| 7482650 |
Method of manufacturing a semiconductor integrated circuit device having a columnar laminate |
Jan. 27, 2009 |
| 7462901 |
Field effect transistor |
Dec. 9, 2008 |
| 7453113 |
Ultra scalable high speed heterojunction vertical n-channel MISFETs and methods thereof |
Nov. 18, 2008 |
| 7420230 |
MOSFET-type semiconductor device, and method of manufacturing the same |
Sep. 2, 2008 |
| 7391070 |
Semiconductor structures and memory device constructions |
Jun. 24, 2008 |
| 7368778 |
DRAM having at least three layered impurity regions between channel holes and method of fabricating same |
May. 6, 2008 |
| 7364997 |
Methods of forming integrated circuitry and methods of forming local interconnects |
Apr. 29, 2008 |
| 7312493 |
Semiconductor device and method of manufacturing the same |
Dec. 25, 2007 |
| 7276754 |
Annular gate and technique for fabricating an annular gate |
Oct. 2, 2007 |
| 7247905 |
Offset vertical device |
Jul. 24, 2007 |
| 7193268 |
Semiconductor device |
Mar. 20, 2007 |
| 7057224 |
Semiconductor memory having an arrangement of memory cells |
Jun. 6, 2006 |
| 7049196 |
Vertical gain cell and array for a dynamic random access memory and method for forming the same |
May. 23, 2006 |
| 7034358 |
Vertical transistor, and a method for producing a vertical transistor |
Apr. 25, 2006 |
| 7026647 |
Device and method for detecting alignment of active areas and memory cell structures in DRAM devices |
Apr. 11, 2006 |
| 7015526 |
Dynamic memory cell and method of manufacturing same |
Mar. 21, 2006 |
| 7009869 |
Dynamic memory cell |
Mar. 7, 2006 |
| 7005346 |
Method for producing a memory cell of a memory cell field in a semiconductor memory |
Feb. 28, 2006 |
| 6977405 |
Semiconductor memory with memory cells comprising a vertical selection transistor and method for fabricating it |
Dec. 20, 2005 |
| 6974988 |
DRAM cell structure capable of high integration and fabrication method thereof |
Dec. 13, 2005 |
| 6934212 |
Semiconductor apparatus |
Aug. 23, 2005 |
| 6930324 |
Device architecture and process for improved vertical memory arrays |
Aug. 16, 2005 |
| 6906372 |
Semiconductor device with vertical transistor formed in a silicon-on-insulator substrate |
Jun. 14, 2005 |
| 6894336 |
Vertical access transistor with curved channel |
May. 17, 2005 |
| 6882006 |
Semiconductor device and method of manufacturing the same |
Apr. 19, 2005 |
| 6833305 |
Vertical DRAM punchthrough stop self-aligned to storage trench |
Dec. 21, 2004 |
| 6822281 |
Trench cell for a DRAM cell array |
Nov. 23, 2004 |
| 6821843 |
Fabrication method for an array area and a support area of a dynamic random access memory |
Nov. 23, 2004 |
| 6808979 |
Method for forming vertical transistor and trench capacitor |
Oct. 26, 2004 |
| 6797590 |
DRAM cell structure capable of high integration and fabrication method thereof |
Sep. 28, 2004 |
| 6791132 |
Memory semiconductor device with reduced sense amplifier area |
Sep. 14, 2004 |
| 6781181 |
Layout of a folded bitline DRAM with a borderless bitline |
Aug. 24, 2004 |
| 6777737 |
Vertical DRAM punchthrough stop self-aligned to storage trench |
Aug. 17, 2004 |
| 6759702 |
Memory cell with vertical transistor and trench capacitor with reduced burried strap |
Jul. 6, 2004 |
| 6756622 |
Vertical gain cell and array for a dynamic random access memory and method for forming the same |
Jun. 29, 2004 |
| 6737695 |
Memory module having a memory cell and method for fabricating the memory module |
May. 18, 2004 |
| 6734485 |
Vertical DRAM cell structure and its contactless DRAM arrays |
May. 11, 2004 |
| 6734056 |
Self-aligned punch through stop for 6F2 rotated hybrid DRAM cell |
May. 11, 2004 |
| 6707092 |
Semiconductor memory having longitudinal cell structure |
Mar. 16, 2004 |
| 6700826 |
Semiconductor apparatus |
Mar. 2, 2004 |
| 6699750 |
Vertical device formed adjacent to a wordline sidewall and method for semiconductor chips |
Mar. 2, 2004 |
| 6680501 |
Semiconductor device |
Jan. 20, 2004 |
| 6680864 |
Method for reading a vertical gain cell and array for a dynamic random access memory |
Jan. 20, 2004 |
| 6660581 |
Method of forming single bitline contact using line shape masks for vertical transistors in DRAM/e-DRAM devices |
Dec. 9, 2003 |
| 6638815 |
Formation of self-aligned vertical connector |
Oct. 28, 2003 |
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