Resources Contact Us Home
Browse by Category: Main > Physics
Class Information
Number: 257/E27.077
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Device consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate, e.g., integrated circuit device (epo) > Including semiconductor component with at least one potential barrier or surface barrier adapted for rectifying, oscillating, amplifying, or switching, or including integrated passive circuit elements (epo) > With semiconductor substrate only (epo) > Including a plurality of individual components in a repetitive configuration (epo) > Including bipolar component (epo) > Including bipolar transistor (epo) > Static bipolar memory cell structure (epo)
Description: This subclass is indented under subclass E27.074. This subclass is substantially the same in scope as ECLA classification H01L27/102T5.

Patents under this class:
1 2

Patent Number Title Of Patent Date Issued
7923756 Metal oxide semiconductor (MOS) device comprising a buried region under drain Apr. 12, 2011
7649259 Semiconductor device including a plurality of wiring lines Jan. 19, 2010
7323349 Self-aligned cross point resistor memory array Jan. 29, 2008
6292390 Semiconductor device Sep. 18, 2001
6232822 Semiconductor device including a bipolar transistor biased to produce a negative base current by the impact ionization mechanism May. 15, 2001
5502327 Semiconductor device Mar. 26, 1996
5471419 Semiconductor device having a programmable memory cell Nov. 28, 1995
5313090 Bipolar memory cell having capacitors May. 17, 1994
5287303 SCR type memory apparatus Feb. 15, 1994
5276638 Bipolar memory cell with isolated PNP load Jan. 4, 1994
5095355 Bipolar cross-coupled memory cells having improved immunity to soft errors Mar. 10, 1992
5016075 Semiconductor memory device May. 14, 1991
4992981 Double-ended memory cell array using interleaved bit lines and method of fabrication therefore Feb. 12, 1991
4984196 High performance bipolar differential sense amplifier in a BiCMOS SRAM Jan. 8, 1991
4981807 Process for fabricating complementary vertical transistor memory cell Jan. 1, 1991
4958320 Radiation resistant bipolar memory Sep. 18, 1990
4956688 Radiation resistant bipolar memory Sep. 11, 1990
4954455 Semiconductor memory device having protection against alpha strike induced errors Sep. 4, 1990
4905078 Semiconductor device Feb. 27, 1990
4829361 Semiconductor device May. 9, 1989
4815037 Bipolar type static memory cell Mar. 21, 1989
4813017 Semiconductor memory device and array Mar. 14, 1989
4809052 Semiconductor memory device Feb. 28, 1989
4807008 Static memory cell using a heterostructure complementary transistor switch Feb. 21, 1989
4799089 Semiconductor memory device Jan. 17, 1989
4785342 Static random access memory having structure of first-, second- and third-level conductive films Nov. 15, 1988
4714842 Integrated injection logic circuits Dec. 22, 1987
4677455 Semiconductor memory device Jun. 30, 1987
4669180 Method of forming emitter coupled logic bipolar memory cell using polysilicon Schottky diodes for coupling Jun. 2, 1987
4656495 Bipolar ram cell and process Apr. 7, 1987
4654824 Emitter coupled logic bipolar memory cell Mar. 31, 1987
4636833 Semiconductor device Jan. 13, 1987
4635087 Monolithic bipolar SCR memory cell Jan. 6, 1987
4635230 Emitter coupled logic bipolar memory cell Jan. 6, 1987
4624863 Method of fabricating Schottky diodes and electrical interconnections in semiconductor structures Nov. 25, 1986
4622575 Integrated circuit bipolar memory cell Nov. 11, 1986
4589096 IIL semiconductor memory including arrangement for preventing information loss during read-out May. 13, 1986
4550390 Semiconductor memory device Oct. 29, 1985
4543595 Bipolar memory cell Sep. 24, 1985
4538244 Semiconductor memory device Aug. 27, 1985
4535425 Highly integrated, high-speed memory with bipolar transistors Aug. 13, 1985
4488350 Method of making an integrated circuit bipolar memory cell Dec. 18, 1984
4463370 Semiconductor device for use in memory cells Jul. 31, 1984
4433471 Method for the formation of high density memory cells using ion implantation techniques Feb. 28, 1984
4431305 High density DC stable memory cell Feb. 14, 1984
4419745 Semiconductor memory device Dec. 6, 1983
4409673 Single isolation cell for DC stable memory Oct. 11, 1983
4400712 Static bipolar random access memory Aug. 23, 1983
4393471 Memory cell arrangement for a static memory Jul. 12, 1983
4388636 Static memory cell and memory constructed from such cells Jun. 14, 1983

1 2

  Recently Added Patents
Process for the production of an acylation catalyst
Computer program, system, and method for mapping Social Security claiming strategies
Produce container and lid assembly
Double diffused metal oxide semiconductor device and manufacturing method thereof
Synthesized interoperable communications
Method for producing lactamates by way of thin film evaporation
SONOS stack with split nitride memory layer
  Randomly Featured Patents
Conversion device
Scanning and decoding control for an optical reader
Headlight of a vehicle for high beam light and low beam light
Image capturing apparatus, information processing apparatus, and control methods thereof
Literacy and language assessment and associated methods
Apparatus and method for performing initial cell search in wireless communication systems
Composition for hybridizing nucleic acids using single-stranded nucleic acid binding protein
Stiff snoring implant
Apparatus for use in disassembling an automobile transmission
Process for managing an electronic transaction by chip card terminal and chip card implementing this process