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Class Information
Number: 257/E27.063
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Device consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate, e.g., integrated circuit device (epo) > Including semiconductor component with at least one potential barrier or surface barrier adapted for rectifying, oscillating, amplifying, or switching, or including integrated passive circuit elements (epo) > With semiconductor substrate only (epo) > Including only semiconductor components of a single kind, e.g., all bipolar transistors, all diodes, or all cmos (epo) > Including field-effect component only (epo) > Field-effect transistor with insulated gate (epo) > Complementary mis (epo) > Means for preventing a parasitic bipolar action between the different transistor regions, e.g. latch-up prevention (epo)
Description: This subclass is indented under subclass E27.062. This subclass is substantially the same in scope as ECLA classification H01L27/092B.

Patents under this class:
1 2 3 4 5 6

Patent Number Title Of Patent Date Issued
8685800 Single event latch-up prevention techniques for a semiconductor device Apr. 1, 2014
8587071 Electrostatic discharge (ESD) guard ring protective structure Nov. 19, 2013
8476710 Vertical complementary FET Jul. 2, 2013
8415749 Semiconductor structure with dielectric-sealed doped region Apr. 9, 2013
8395223 Coaxial transistor structure Mar. 12, 2013
8354722 SCR/MOS clamp for ESD protection of integrated circuits Jan. 15, 2013
8278715 Electrostatic discharge protection device Oct. 2, 2012
8222702 CMOS diodes with dual gate conductors, and methods for forming the same Jul. 17, 2012
8198688 Semiconductor integrated circuit device with MOSFET limiter circuit Jun. 12, 2012
8116050 Semiconductor integrated circuit Feb. 14, 2012
8072032 Semiconductor integrated circuit device having latchup preventing function Dec. 6, 2011
8035134 Forward body bias-controlled semiconductor integrated circuit Oct. 11, 2011
7868392 Integrated circuit tolerant to the locking phenomenon Jan. 11, 2011
7855420 Structure for a latchup robust array I/O using through wafer via Dec. 21, 2010
7843002 Fully isolated high-voltage MOS device Nov. 30, 2010
7800183 Semiconductor device Sep. 21, 2010
7755149 Photo mask and semiconductor device fabricated using the same Jul. 13, 2010
7741681 Latchup robust array I/O using through wafer via Jun. 22, 2010
7737500 CMOS diodes with dual gate conductors, and methods for forming the same Jun. 15, 2010
7727848 Methods and semiconductor structures for latch-up suppression using a conductive region Jun. 1, 2010
7723799 Semiconductor device May. 25, 2010
7675120 Integrated circuit having a multipurpose resistor for suppression of a parasitic transistor or other purposes Mar. 9, 2010
7675055 Strained complementary metal oxide semiconductor (CMOS) on rotated wafers and methods thereof Mar. 9, 2010
7671424 Power MOSFET, semiconductor device including the power MOSFET, and method for making the power MOSFET Mar. 2, 2010
7655985 Methods and semiconductor structures for latch-up suppression using a conductive region Feb. 2, 2010
7615828 CMOS devices adapted to prevent latchup and methods of manufacturing the same Nov. 10, 2009
7589397 System and method for providing a uniform oxide layer over a laser trimmed fuse with a differential wet etch stop technique Sep. 15, 2009
7586122 Thin film transistor substrate and manufacturing method thereof Sep. 8, 2009
7579658 Devices without current crowding effect at the finger's ends Aug. 25, 2009
7521310 Vertical thyristor in complementary SiGe bipolar process Apr. 21, 2009
7514754 Complementary metal-oxide-semiconductor transistor for avoiding a latch-up problem Apr. 7, 2009
7442996 Structure and method for enhanced triple well latchup robustness Oct. 28, 2008
7396732 Formation of deep trench airgaps and related applications Jul. 8, 2008
7358573 Triple-well CMOS devices with increased latch-up immunity and methods of fabricating same Apr. 15, 2008
7342281 Electrostatic discharge protection circuit using triple welled silicon controlled rectifier Mar. 11, 2008
7309883 Semiconductor device capable of preventing current flow caused by latch-up and method of forming the same Dec. 18, 2007
7268400 Triple-well CMOS devices with increased latch-up immunity and methods of fabricating same Sep. 11, 2007
7244992 Turn-on-efficient bipolar structures with deep N-well for on-chip ESD protection Jul. 17, 2007
7041581 Method and structure for improving latch-up immunity using non-dopant implants May. 9, 2006
7020857 Method and apparatus for providing noise suppression in a integrated circuit Mar. 28, 2006
6995435 Apparatus and circuit having reduced leakage current and method therefor Feb. 7, 2006
6992361 Deep well implant structure providing latch-up resistant CMOS semiconductor product Jan. 31, 2006
6979845 Semiconductor device in which punchthrough is prevented Dec. 27, 2005
6969893 Semiconductor device and portable electronic apparatus Nov. 29, 2005
6956266 Structure and method for latchup suppression utilizing trench and masked sub-collector implantation Oct. 18, 2005
6946710 Method and structure to reduce CMOS inter-well leakage Sep. 20, 2005
6937068 Semiconductor integrated circuit Aug. 30, 2005
6933770 Metal oxide semiconductor (MOS) bandgap voltage reference circuit Aug. 23, 2005
6927442 Charge pump device Aug. 9, 2005
6902967 Integrated circuit with a MOS structure having reduced parasitic bipolar transistor action Jun. 7, 2005

1 2 3 4 5 6

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