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Class Information
Number: 257/E27.009
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Device consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate, e.g., integrated circuit device (epo) > Including semiconductor component with at least one potential barrier or surface barrier adapted for rectifying, oscillating, amplifying, or switching, or including integrated passive circuit elements (epo)
Description: This subclass is indented under subclass E27.001. This subclass is substantially the same in scope as ECLA classification H01L27/02.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7626267 |
Semiconductor integrated circuit device including wiring lines and interconnections |
Dec. 1, 2009 |
| 7615810 |
Electro-optical device, method of manufacturing electro-optical device, and electronic apparatus |
Nov. 10, 2009 |
| 7608902 |
Nanowire composite and preparation method thereof |
Oct. 27, 2009 |
| 7582946 |
Semiconductor device with multi-trench separation region and method for producing the same |
Sep. 1, 2009 |
| 7569908 |
Semiconductor device and method of manufacturing the same |
Aug. 4, 2009 |
| 7538411 |
Integrated circuit including resistivity changing memory cells |
May. 26, 2009 |
| 7405448 |
Semiconductor device having a resistance for equalizing the current distribution |
Jul. 29, 2008 |
| 7323763 |
Semiconductor device having an improved voltage controlled oscillator |
Jan. 29, 2008 |
| 7307331 |
Integrated radio front-end module with embedded circuit elements |
Dec. 11, 2007 |
| 7268410 |
Integrated switching voltage regulator using copper process technology |
Sep. 11, 2007 |
| 7196397 |
Termination design with multiple spiral trench rings |
Mar. 27, 2007 |
| 7190020 |
Non-planar flash memory having shielding between floating gates |
Mar. 13, 2007 |
| 7176550 |
Method and device for forming a winding on a non-planar substrate |
Feb. 13, 2007 |
| 7170121 |
Computer system architecture using a proximity I/O switch |
Jan. 30, 2007 |
| 7166904 |
Structure and method for local resistor element in integrated circuit technology |
Jan. 23, 2007 |
| 7148554 |
Discrete electronic component arrangement including anchoring, thermally conductive pad |
Dec. 12, 2006 |
| 7091577 |
Voltage-dividing resistor and semiconductor device having the same |
Aug. 15, 2006 |
| 7015336 |
Sub-nanoscale electronic devices and processes |
Mar. 21, 2006 |
| 7008873 |
Integrated circuit with reverse engineering protection |
Mar. 7, 2006 |
| 6979606 |
Use of silicon block process step to camouflage a false transistor |
Dec. 27, 2005 |
| 6940764 |
Memory with a bit line block and/or a word line block for preventing reverse engineering |
Sep. 6, 2005 |
| 6897535 |
Integrated circuit with reverse engineering protection |
May. 24, 2005 |
| 6858795 |
Radiation shielding of three dimensional multi-chip modules |
Feb. 22, 2005 |
| 6815816 |
Implanted hidden interconnections in a semiconductor device for preventing reverse engineering |
Nov. 9, 2004 |
| 6613978 |
Radiation shielding of three dimensional multi-chip modules |
Sep. 2, 2003 |
| 6613661 |
Process for fabricating secure integrated circuit |
Sep. 2, 2003 |
| 6614080 |
Mask programmed ROM inviolable by reverse engineering inspections and method of fabrication |
Sep. 2, 2003 |
| 6608386 |
Sub-nanoscale electronic devices and processes |
Aug. 19, 2003 |
| 6515304 |
Device for defeating reverse engineering of integrated circuits by optical means |
Feb. 4, 2003 |
| 6492866 |
Electronic circuit with bulk biasing for providing accurate electronically controlled resistance |
Dec. 10, 2002 |
| 6459629 |
Memory with a bit line block and/or a word line block for preventing reverse engineering |
Oct. 1, 2002 |
| 6320200 |
Sub-nanoscale electronic devices and processes |
Nov. 20, 2001 |
| 6294816 |
Secure integrated circuit |
Sep. 25, 2001 |
| 6284627 |
Method for wiring semi-conductor components in order to prevent product piracy and manipulation, semi-conductors component made according to this method and use of said semi-conductor componen |
Sep. 4, 2001 |
| 6151245 |
Screened EEPROM cell |
Nov. 21, 2000 |
| 6117762 |
Method and apparatus using silicide layer for protecting integrated circuits from reverse engineering |
Sep. 12, 2000 |
| 6064110 |
Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
May. 16, 2000 |
| 5973375 |
Camouflaged circuit structure with step implants |
Oct. 26, 1999 |
| 5930663 |
Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
Jul. 27, 1999 |
| 5889316 |
Radiation shielding of plastic integrated circuits |
Mar. 30, 1999 |
| 5875113 |
Process to prevent the exploitation of illicit knowledge of the structure or function of an integrated circuit |
Feb. 23, 1999 |
| 5866933 |
Integrated circuit security system and method with implanted interconnections |
Feb. 2, 1999 |
| 5825042 |
Radiation shielding of plastic integrated circuits |
Oct. 20, 1998 |
| 5824571 |
Multi-layered contacting for securing integrated circuits |
Oct. 20, 1998 |
| 5821582 |
Structures for preventing reverse engineering of integrated circuits |
Oct. 13, 1998 |
| 5783846 |
Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
Jul. 21, 1998 |
| 5742080 |
Magnetically controlled logic cell |
Apr. 21, 1998 |
| 5736777 |
Method and apparatus for fast self-destruction of a CMOS integrated circuit |
Apr. 7, 1998 |
| 5723876 |
Device and method for programming a logic level within an intergrated circuit using multiple mask layers |
Mar. 3, 1998 |
| 5644144 |
Device and method for programming a logic level within an integrated circuit using multiple mask layers |
Jul. 1, 1997 |
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